mirror of
https://github.com/emsesp/EMS-ESP32.git
synced 2025-12-08 00:39:50 +03:00
do not call shell while sending
This commit is contained in:
@@ -434,7 +434,13 @@ void Console::loop() {
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telnet_.loop();
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telnet_.loop();
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#endif
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#endif
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#if defined(ESP8266)
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if (!EMSuart::sending()) {
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Shell::loop_all();
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}
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#else
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Shell::loop_all();
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Shell::loop_all();
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#endif
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}
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}
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} // namespace emsesp
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} // namespace emsesp
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@@ -453,11 +453,6 @@ void TxService::send_telegram(const QueuedTxTelegram & tx_telegram) {
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length++; // add one since we want to now include the CRC
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length++; // add one since we want to now include the CRC
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// logging interferes with the UART so disable this
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#if defined(ESP8266)
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if (Settings().ems_tx_mode() <= 4) {
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#endif
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// This logging causes errors with timer based tx-modes on esp8266!
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LOG_DEBUG(F("Sending %s Tx [#%d], telegram: %s"),
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LOG_DEBUG(F("Sending %s Tx [#%d], telegram: %s"),
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(telegram->operation == Telegram::Operation::TX_WRITE) ? F("write") : F("read"),
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(telegram->operation == Telegram::Operation::TX_WRITE) ? F("write") : F("read"),
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tx_telegram.id_,
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tx_telegram.id_,
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@@ -469,9 +464,6 @@ void TxService::send_telegram(const QueuedTxTelegram & tx_telegram) {
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LOG_NOTICE(F("[DEBUG] Tx: %s"), Helpers::data_to_hex(telegram_raw, length).c_str());
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LOG_NOTICE(F("[DEBUG] Tx: %s"), Helpers::data_to_hex(telegram_raw, length).c_str());
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}
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}
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#endif
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#endif
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#if defined(ESP8266)
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}
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#endif
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// send the telegram to the UART Tx
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// send the telegram to the UART Tx
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uint16_t status = EMSuart::transmit(telegram_raw, length);
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uint16_t status = EMSuart::transmit(telegram_raw, length);
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@@ -34,6 +34,7 @@ uint8_t emsTxBuf[EMS_MAXBUFFERSIZE];
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uint8_t emsTxBufIdx;
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uint8_t emsTxBufIdx;
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uint8_t emsTxBufLen;
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uint8_t emsTxBufLen;
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uint32_t emsTxWait;
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uint32_t emsTxWait;
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bool EMSuart::sending_ = false;
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//
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//
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// Main interrupt handler
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// Main interrupt handler
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@@ -57,8 +58,8 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
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}
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}
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if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block
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if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk
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if (emsTxBufIdx < emsTxBufLen) { // timer tx_mode is interrupted by <brk>
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if (emsTxBufIdx < emsTxBufLen) { // irq tx_mode is interrupted by <brk>
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emsTxBufIdx = emsTxBufLen; // stop timer mode
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emsTxBufIdx = emsTxBufLen; // stop tx
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drop_next_rx = true; // we have trash in buffer
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drop_next_rx = true; // we have trash in buffer
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}
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}
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USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
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USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
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@@ -78,6 +79,7 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
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system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
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system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
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}
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}
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drop_next_rx = false;
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drop_next_rx = false;
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sending_ = false;
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}
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}
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}
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}
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@@ -152,8 +154,11 @@ void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
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// set 9600, 8 bits, no parity check, 1 stop bit
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// set 9600, 8 bits, no parity check, 1 stop bit
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USD(EMSUART_UART) = (UART_CLK_FREQ / EMSUART_BAUD);
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USD(EMSUART_UART) = (UART_CLK_FREQ / EMSUART_BAUD);
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USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
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if (tx_mode_ == 5) {
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USC0(EMSUART_UART) = 0x2C; // 8N1.5
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} else {
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USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
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}
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emsuart_flush_fifos();
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emsuart_flush_fifos();
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// conf1 params
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// conf1 params
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@@ -217,6 +222,12 @@ void ICACHE_FLASH_ATTR EMSuart::restart() {
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emsTxBufIdx = 0;
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emsTxBufIdx = 0;
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emsTxBufLen = 0;
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emsTxBufLen = 0;
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timer1_enable(TIM_DIV16, TIM_EDGE, TIM_SINGLE);
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timer1_enable(TIM_DIV16, TIM_EDGE, TIM_SINGLE);
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if (tx_mode_ == 5) {
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USC0(EMSUART_UART) = 0x2C; // 8N1.5
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} else {
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USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
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}
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}
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}
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/*
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/*
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@@ -247,6 +258,7 @@ void ICACHE_FLASH_ATTR EMSuart::tx_brk() {
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void EMSuart::send_poll(uint8_t data) {
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void EMSuart::send_poll(uint8_t data) {
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// reset tx-brk, just in case it is accidentally set
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// reset tx-brk, just in case it is accidentally set
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USC0(EMSUART_UART) &= ~(1 << UCBRK);
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USC0(EMSUART_UART) &= ~(1 << UCBRK);
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sending_ = true;
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if (tx_mode_ > 5) { // timer controlled modes
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if (tx_mode_ > 5) { // timer controlled modes
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USF(EMSUART_UART) = data;
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USF(EMSUART_UART) = data;
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@@ -300,9 +312,9 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
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if (len == 0 || len >= EMS_MAXBUFFERSIZE) {
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if (len == 0 || len >= EMS_MAXBUFFERSIZE) {
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return EMS_TX_STATUS_ERR; // nothing or to much to send
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return EMS_TX_STATUS_ERR; // nothing or to much to send
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}
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}
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// reset tx-brk, just in case it is accidentally set
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// reset tx-brk, just in case it is accidentally set
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USC0(EMSUART_UART) &= ~(1 << UCBRK);
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USC0(EMSUART_UART) &= ~(1 << UCBRK);
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sending_ = true;
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// timer controlled modes with extra delay
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// timer controlled modes with extra delay
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if (tx_mode_ > 5) {
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if (tx_mode_ > 5) {
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@@ -323,9 +335,9 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
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USIC(EMSUART_UART) |= (1 << UIFF); // clear fifo-full irq
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USIC(EMSUART_UART) |= (1 << UIFF); // clear fifo-full irq
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emsTxBufIdx = 0;
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emsTxBufIdx = 0;
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emsTxBufLen = len;
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emsTxBufLen = len;
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USF(EMSUART_UART) = buf[0];
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USC1(EMSUART_UART) = (0x01 << UCFFT); // fifo full to 1
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USC1(EMSUART_UART) = (0x01 << UCFFT); // fifo full to 1
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USIE(EMSUART_UART) |= (1 << UIFF); // enable fifo-full irq
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USIE(EMSUART_UART) |= (1 << UIFF); // enable fifo-full irq
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USF(EMSUART_UART) = buf[0];
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return EMS_TX_STATUS_OK;
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return EMS_TX_STATUS_OK;
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}
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}
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@@ -421,7 +433,6 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
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}
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}
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ETS_UART_INTR_ENABLE(); // open up the FIFO again to start receiving
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ETS_UART_INTR_ENABLE(); // open up the FIFO again to start receiving
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return EMS_TX_STATUS_OK; // send the Tx ok status back
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return EMS_TX_STATUS_OK; // send the Tx ok status back
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}
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}
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@@ -70,6 +70,9 @@ class EMSuart {
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static void ICACHE_FLASH_ATTR restart();
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static void ICACHE_FLASH_ATTR restart();
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static void ICACHE_FLASH_ATTR send_poll(uint8_t data);
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static void ICACHE_FLASH_ATTR send_poll(uint8_t data);
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static uint16_t ICACHE_FLASH_ATTR transmit(uint8_t * buf, uint8_t len);
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static uint16_t ICACHE_FLASH_ATTR transmit(uint8_t * buf, uint8_t len);
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static bool sending() {
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return sending_;
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}
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typedef struct {
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typedef struct {
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uint8_t length;
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uint8_t length;
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@@ -82,6 +85,7 @@ class EMSuart {
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static void ICACHE_FLASH_ATTR emsuart_flush_fifos();
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static void ICACHE_FLASH_ATTR emsuart_flush_fifos();
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static void ICACHE_FLASH_ATTR tx_brk();
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static void ICACHE_FLASH_ATTR tx_brk();
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static void ICACHE_RAM_ATTR emsuart_tx_timer_intr_handler();
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static void ICACHE_RAM_ATTR emsuart_tx_timer_intr_handler();
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static bool sending_;
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};
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};
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} // namespace emsesp
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} // namespace emsesp
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