do not call shell while sending

This commit is contained in:
MichaelDvP
2020-06-21 14:18:28 +02:00
parent 04503298ab
commit 5d6e9dd704
4 changed files with 29 additions and 16 deletions

View File

@@ -434,7 +434,13 @@ void Console::loop() {
telnet_.loop(); telnet_.loop();
#endif #endif
#if defined(ESP8266)
if (!EMSuart::sending()) {
Shell::loop_all();
}
#else
Shell::loop_all(); Shell::loop_all();
#endif
} }
} // namespace emsesp } // namespace emsesp

View File

@@ -453,11 +453,6 @@ void TxService::send_telegram(const QueuedTxTelegram & tx_telegram) {
length++; // add one since we want to now include the CRC length++; // add one since we want to now include the CRC
// logging interferes with the UART so disable this
#if defined(ESP8266)
if (Settings().ems_tx_mode() <= 4) {
#endif
// This logging causes errors with timer based tx-modes on esp8266!
LOG_DEBUG(F("Sending %s Tx [#%d], telegram: %s"), LOG_DEBUG(F("Sending %s Tx [#%d], telegram: %s"),
(telegram->operation == Telegram::Operation::TX_WRITE) ? F("write") : F("read"), (telegram->operation == Telegram::Operation::TX_WRITE) ? F("write") : F("read"),
tx_telegram.id_, tx_telegram.id_,
@@ -469,9 +464,6 @@ void TxService::send_telegram(const QueuedTxTelegram & tx_telegram) {
LOG_NOTICE(F("[DEBUG] Tx: %s"), Helpers::data_to_hex(telegram_raw, length).c_str()); LOG_NOTICE(F("[DEBUG] Tx: %s"), Helpers::data_to_hex(telegram_raw, length).c_str());
} }
#endif #endif
#if defined(ESP8266)
}
#endif
// send the telegram to the UART Tx // send the telegram to the UART Tx
uint16_t status = EMSuart::transmit(telegram_raw, length); uint16_t status = EMSuart::transmit(telegram_raw, length);

View File

@@ -34,6 +34,7 @@ uint8_t emsTxBuf[EMS_MAXBUFFERSIZE];
uint8_t emsTxBufIdx; uint8_t emsTxBufIdx;
uint8_t emsTxBufLen; uint8_t emsTxBufLen;
uint32_t emsTxWait; uint32_t emsTxWait;
bool EMSuart::sending_ = false;
// //
// Main interrupt handler // Main interrupt handler
@@ -57,8 +58,8 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
} }
if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block
USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk
if (emsTxBufIdx < emsTxBufLen) { // timer tx_mode is interrupted by <brk> if (emsTxBufIdx < emsTxBufLen) { // irq tx_mode is interrupted by <brk>
emsTxBufIdx = emsTxBufLen; // stop timer mode emsTxBufIdx = emsTxBufLen; // stop tx
drop_next_rx = true; // we have trash in buffer drop_next_rx = true; // we have trash in buffer
} }
USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
@@ -78,6 +79,7 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
} }
drop_next_rx = false; drop_next_rx = false;
sending_ = false;
} }
} }
@@ -152,8 +154,11 @@ void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
// set 9600, 8 bits, no parity check, 1 stop bit // set 9600, 8 bits, no parity check, 1 stop bit
USD(EMSUART_UART) = (UART_CLK_FREQ / EMSUART_BAUD); USD(EMSUART_UART) = (UART_CLK_FREQ / EMSUART_BAUD);
USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1 if (tx_mode_ == 5) {
USC0(EMSUART_UART) = 0x2C; // 8N1.5
} else {
USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
}
emsuart_flush_fifos(); emsuart_flush_fifos();
// conf1 params // conf1 params
@@ -217,6 +222,12 @@ void ICACHE_FLASH_ATTR EMSuart::restart() {
emsTxBufIdx = 0; emsTxBufIdx = 0;
emsTxBufLen = 0; emsTxBufLen = 0;
timer1_enable(TIM_DIV16, TIM_EDGE, TIM_SINGLE); timer1_enable(TIM_DIV16, TIM_EDGE, TIM_SINGLE);
if (tx_mode_ == 5) {
USC0(EMSUART_UART) = 0x2C; // 8N1.5
} else {
USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
}
} }
/* /*
@@ -247,6 +258,7 @@ void ICACHE_FLASH_ATTR EMSuart::tx_brk() {
void EMSuart::send_poll(uint8_t data) { void EMSuart::send_poll(uint8_t data) {
// reset tx-brk, just in case it is accidentally set // reset tx-brk, just in case it is accidentally set
USC0(EMSUART_UART) &= ~(1 << UCBRK); USC0(EMSUART_UART) &= ~(1 << UCBRK);
sending_ = true;
if (tx_mode_ > 5) { // timer controlled modes if (tx_mode_ > 5) { // timer controlled modes
USF(EMSUART_UART) = data; USF(EMSUART_UART) = data;
@@ -300,9 +312,9 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
if (len == 0 || len >= EMS_MAXBUFFERSIZE) { if (len == 0 || len >= EMS_MAXBUFFERSIZE) {
return EMS_TX_STATUS_ERR; // nothing or to much to send return EMS_TX_STATUS_ERR; // nothing or to much to send
} }
// reset tx-brk, just in case it is accidentally set // reset tx-brk, just in case it is accidentally set
USC0(EMSUART_UART) &= ~(1 << UCBRK); USC0(EMSUART_UART) &= ~(1 << UCBRK);
sending_ = true;
// timer controlled modes with extra delay // timer controlled modes with extra delay
if (tx_mode_ > 5) { if (tx_mode_ > 5) {
@@ -323,9 +335,9 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
USIC(EMSUART_UART) |= (1 << UIFF); // clear fifo-full irq USIC(EMSUART_UART) |= (1 << UIFF); // clear fifo-full irq
emsTxBufIdx = 0; emsTxBufIdx = 0;
emsTxBufLen = len; emsTxBufLen = len;
USF(EMSUART_UART) = buf[0];
USC1(EMSUART_UART) = (0x01 << UCFFT); // fifo full to 1 USC1(EMSUART_UART) = (0x01 << UCFFT); // fifo full to 1
USIE(EMSUART_UART) |= (1 << UIFF); // enable fifo-full irq USIE(EMSUART_UART) |= (1 << UIFF); // enable fifo-full irq
USF(EMSUART_UART) = buf[0];
return EMS_TX_STATUS_OK; return EMS_TX_STATUS_OK;
} }
@@ -421,7 +433,6 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
} }
ETS_UART_INTR_ENABLE(); // open up the FIFO again to start receiving ETS_UART_INTR_ENABLE(); // open up the FIFO again to start receiving
return EMS_TX_STATUS_OK; // send the Tx ok status back return EMS_TX_STATUS_OK; // send the Tx ok status back
} }

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@@ -70,6 +70,9 @@ class EMSuart {
static void ICACHE_FLASH_ATTR restart(); static void ICACHE_FLASH_ATTR restart();
static void ICACHE_FLASH_ATTR send_poll(uint8_t data); static void ICACHE_FLASH_ATTR send_poll(uint8_t data);
static uint16_t ICACHE_FLASH_ATTR transmit(uint8_t * buf, uint8_t len); static uint16_t ICACHE_FLASH_ATTR transmit(uint8_t * buf, uint8_t len);
static bool sending() {
return sending_;
}
typedef struct { typedef struct {
uint8_t length; uint8_t length;
@@ -82,6 +85,7 @@ class EMSuart {
static void ICACHE_FLASH_ATTR emsuart_flush_fifos(); static void ICACHE_FLASH_ATTR emsuart_flush_fifos();
static void ICACHE_FLASH_ATTR tx_brk(); static void ICACHE_FLASH_ATTR tx_brk();
static void ICACHE_RAM_ATTR emsuart_tx_timer_intr_handler(); static void ICACHE_RAM_ATTR emsuart_tx_timer_intr_handler();
static bool sending_;
}; };
} // namespace emsesp } // namespace emsesp