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Merge branch 'v2a8' of https://github.com/proddy/EMS-ESP into v2

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This commit is contained in:
MichaelDvP
2020-05-28 08:25:36 +02:00
parent 55c60365f6 69646c1a1c
commit 5f1d6adaf5
36 changed files with 857 additions and 532 deletions
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89
src/uart/emsuart_esp32.cpp
View File

@@ -16,7 +16,9 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* ESP32 UART port by Arwed Richert @ArwedL */
/*
* ESP32 UART port by @ArwedL and improved by @MichaelDvP. See https://github.com/proddy/EMS-ESP/issues/380
*/
#if defined(ESP32)
@@ -26,20 +28,20 @@
namespace emsesp {
static intr_handle_t uart_handle;
static RingbufHandle_t buf_handle = NULL;
static uint8_t rxbuf[UART_FIFO_LEN];
static uint8_t rxlen;
static intr_handle_t uart_handle;
static RingbufHandle_t buf_handle = NULL;
static uint8_t rxbuf[UART_FIFO_LEN];
static uint8_t rxlen;
bool drop_first_rx = true;
/*
* Task to handle the incoming data.
* Task to handle the incoming data
*/
void EMSuart::emsuart_recvTask(void * param) {
while(1) {
while (1) {
size_t item_size;
uint8_t * telegram = (uint8_t *)xRingbufferReceive(buf_handle, &item_size, portMAX_DELAY);
uint8_t telegramSize = item_size;
uint8_t telegramSize = item_size;
if (telegram) {
EMSESP::incoming_telegram(telegram, telegramSize);
@@ -50,17 +52,17 @@ void EMSuart::emsuart_recvTask(void * param) {
/*
* UART interrupt, on break read the fifo and put the whole telegram to ringbuffer
*/
static void IRAM_ATTR uart_intr_handle(void *arg)
{
static void IRAM_ATTR uart_intr_handle(void * arg) {
if (EMS_UART.int_st.brk_det) {
uint8_t rx_fifo_len = EMS_UART.status.rxfifo_cnt;
for (rxlen = 0; rxlen < rx_fifo_len; rxlen++) {
rxbuf[rxlen] = EMS_UART.fifo.rw_byte; // read all bytes into buffer
}
if ((rxlen == 2) || ((rxlen > 4) && (rxlen <= EMS_MAXBUFFERSIZE))) {
if (!drop_first_rx && (rxlen == 2) || ((rxlen > 4) && (rxlen <= EMS_MAXBUFFERSIZE))) {
int baseType = 0;
xRingbufferSendFromISR(buf_handle, rxbuf, rxlen - 1, &baseType);
}
drop_first_rx = false;
EMS_UART.int_clr.brk_det = 1; // clear flag
EMS_UART.conf0.txd_brk = 0; // if it was break from sending, clear bit
}
@@ -69,47 +71,52 @@ static void IRAM_ATTR uart_intr_handle(void *arg)
* init UART driver
*/
void EMSuart::start(uint8_t tx_mode) {
uart_config_t uart_config = {
.baud_rate = EMSUART_BAUD,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
};
uart_config_t uart_config = {
.baud_rate = EMSUART_BAUD,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
};
ESP_ERROR_CHECK(uart_param_config(EMSUART_UART, &uart_config));
ESP_ERROR_CHECK(uart_set_pin(EMSUART_UART, EMSUART_TXPIN, EMSUART_RXPIN, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
//EMS_UART.conf1.rxfifo_full_thrhd = 127; // enough to hold the incomming telegram, should never reached
//EMS_UART.idle_conf.tx_brk_num = 12; // breaklenght 12 bit
EMS_UART.int_ena.val = 0; // diable all intr.
EMS_UART.int_clr.val = 0xFFFFFFFF; // clear all intr. flags
EMS_UART.int_ena.brk_det = 1; // activate only break
buf_handle = xRingbufferCreate(128, RINGBUF_TYPE_NOSPLIT);
ESP_ERROR_CHECK(uart_isr_register(EMSUART_UART,uart_intr_handle, NULL, ESP_INTR_FLAG_IRAM, &uart_handle));
//EMS_UART.conf1.rxfifo_full_thrhd = 127; // enough to hold the incoming telegram, should never reached
//EMS_UART.idle_conf.tx_brk_num = 12; // breaklength 12 bit
EMS_UART.int_ena.val = 0; // disable all intr.
EMS_UART.int_clr.val = 0xFFFFFFFF; // clear all intr. flags
buf_handle = xRingbufferCreate(128, RINGBUF_TYPE_NOSPLIT);
ESP_ERROR_CHECK(uart_isr_register(EMSUART_UART, uart_intr_handle, NULL, ESP_INTR_FLAG_IRAM, &uart_handle));
xTaskCreate(emsuart_recvTask, "emsuart_recvTask", 2048, NULL, 12, NULL);
drop_first_rx = true;
EMS_UART.int_ena.brk_det = 1; // activate only break
}
/*
/*
* Stop, disables interrupt
*/
void EMSuart::stop(){
EMS_UART.int_ena.val = 0; //diable all intr.
};
void EMSuart::stop() {
EMS_UART.int_ena.val = 0; // disable all intr.
};
/*
/*
* Restart Interrupt
*/
void EMSuart::restart(){
EMS_UART.int_clr.val = 0xFFFFFFFF; // clear all intr. flags
void EMSuart::restart() {
if (EMS_UART.int_st.brk_det) {
EMS_UART.int.clr.brk_det = 1; // clear break if happend
drop_first_rx = true; // and drop first frame
}
EMS_UART.int_ena.brk_det = 1; // activate only break
};
/*
};
/*
* Sends a 1-byte poll, ending with a <BRK>
*/
void EMSuart::send_poll(uint8_t data) {
EMS_UART.conf0.txd_brk = 0; // just to make sure the bit is cleared
EMS_UART.fifo.rw_byte = data;
EMS_UART.idle_conf.tx_brk_num = 12; // breaklenght 12 bit
EMS_UART.conf0.txd_brk = 0; // just to make sure the bit is cleared
EMS_UART.fifo.rw_byte = data;
EMS_UART.idle_conf.tx_brk_num = 12; // breaklength 12 bit
EMS_UART.conf0.txd_brk = 1; // sending ends in a break
}
@@ -123,12 +130,12 @@ EMSUART_STATUS EMSuart::transmit(uint8_t * buf, uint8_t len) {
if (EMS_UART.status.txfifo_cnt > 0) { // fifo not empty
return EMS_TX_WTD_TIMEOUT;
}
EMS_UART.conf0.txd_brk = 0; // just to make sure the bit is cleared
EMS_UART.conf0.txd_brk = 0; // just to make sure the bit is cleared
for (uint8_t i = 0; i < len; i++) {
EMS_UART.fifo.rw_byte = buf[i];
}
//uart_tx_chars(EMSUART_UART, (const char *)buf, len);
EMS_UART.idle_conf.tx_brk_num = 12; // breaklenght 12 bit
EMS_UART.idle_conf.tx_brk_num = 12; // breaklength 12 bit
EMS_UART.conf0.txd_brk = 1; // sending ends in a break
}
return EMS_TX_STATUS_OK;

17
src/uart/emsuart_esp32.h
View File

@@ -27,14 +27,15 @@
#include "freertos/queue.h"
#include <driver/uart.h>
#define EMS_MAXBUFFERSIZE 33 // max size of the buffer. EMS packets are max 32 bytes, plus BRK
#define EMSUART_UART UART_NUM_2 // UART 0 --> Changed to 2 for ESP32 // To do: Adapt
#define EMS_UART UART2 // for intr setting
//#define EMSUART_RXPIN 17 // To do: Adapt seems to be IO17 for ESP32 UART2 RX pin
//#define EMSUART_TXPIN 16 // To do: Adapt seems to be IO16 for ESP32 UART2 TX pin
#define EMSUART_RXPIN 23 // Wemos D1 ESP32 UART2 RX pin for compatibility
#define EMSUART_TXPIN 5 // Wemos D1 ESP32 UART2 TX pin for compatibility
#define EMSUART_BAUD 9600 // uart baud rate for the EMS circuit
#define EMS_MAXBUFFERSIZE 33 // max size of the buffer. EMS packets are max 32 bytes, plus extra 2 for BRKs
#define EMSUART_UART UART_NUM_2 // on the ESP32 we're using UART2
#define EMS_UART UART2 // for intr setting
#define EMSUART_BAUD 9600 // uart baud rate for the EMS circuit
// customize the GPIO pins for RX and TX here
#define EMSUART_RXPIN 23 // 17 is UART2 RX. Use 23 for D7 on a Wemos D1-32 mini for backwards compatabilty
#define EMSUART_TXPIN 5 // 16 is UART2 TX. Use 5 for D8 on a Wemos D1-32 mini for backwards compatabilty
namespace emsesp {

236
src/uart/emsuart_esp8266.cpp
View File

@@ -25,15 +25,15 @@
namespace emsesp {
os_event_t recvTaskQueue[EMSUART_recvTaskQueueLen]; // our Rx queue
EMSuart::EMSRxBuf_t * pEMSRxBuf;
EMSuart::EMSRxBuf_t * paEMSRxBuf[EMS_MAXBUFFERS];
uint8_t emsRxBufIdx = 0;
uint8_t emsRxBufIdx = 0;
bool drop_first_rx = true;
uint8_t phantomBreak = 0;
uint8_t tx_mode_ = EMS_TXMODE_NEW;
//
// Main interrupt handler
// Important: must not use ICACHE_FLASH_ATTR
//
void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
static uint8_t length = 0;
static uint8_t uart_buffer[128];
@@ -46,13 +46,14 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
}
USIE(EMSUART_UART) = 0; // disable all interrupts and clear them
USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset <BRK> from sending
if (length < EMS_MAXBUFFERSIZE) { // only a valid telegram
if (!drop_first_rx && (length < EMS_MAXBUFFERSIZE)) { // only a valid telegram
pEMSRxBuf->length = length;
os_memcpy((void *)pEMSRxBuf->buffer, (void *)&uart_buffer, pEMSRxBuf->length); // copy data into transfer buffer, including the BRK 0x00 at the end
system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
}
USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
USIE(EMSUART_UART) = (1 << UIBD); // enable only rx break
drop_first_rx = false;
USIC(EMSUART_UART) |= (1 << UIBD); // INT clear the BREAK detect interrupt
USIE(EMSUART_UART) = (1 << UIBD); // enable only rx break
}
}
@@ -67,6 +68,11 @@ void ICACHE_FLASH_ATTR EMSuart::emsuart_recvTask(os_event_t * events) {
uint8_t length = pCurrent->length; // number of bytes including the BRK at the end
pCurrent->length = 0;
if (phantomBreak) {
phantomBreak = 0;
length--; // remove phantom break from Rx buffer
}
// it's a poll or status code, single byte and ok to send on, then quit
if (length == 2) {
EMSESP::incoming_telegram((uint8_t *)pCurrent->buffer, 1);
@@ -74,7 +80,7 @@ void ICACHE_FLASH_ATTR EMSuart::emsuart_recvTask(os_event_t * events) {
}
// also telegrams with no data value
// then transmit EMS buffer, excluding the BRK, lenght is checked by irq
// then transmit EMS buffer, excluding the BRK, length is checked by irq
if (length > 4) {
EMSESP::incoming_telegram((uint8_t *)pCurrent->buffer, length - 1);
}
@@ -84,7 +90,7 @@ void ICACHE_FLASH_ATTR EMSuart::emsuart_recvTask(os_event_t * events) {
* init UART0 driver
*/
void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
tx_mode_ = tx_mode;
// allocate and preset EMS Receive buffers
for (int i = 0; i < EMS_MAXBUFFERS; i++) {
EMSRxBuf_t * p = (EMSRxBuf_t *)malloc(sizeof(EMSRxBuf_t));
@@ -92,9 +98,6 @@ void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
}
pEMSRxBuf = paEMSRxBuf[0]; // reset EMS Rx Buffer
//ETS_UART_INTR_DISABLE();
//ETS_UART_INTR_ATTACH(nullptr, nullptr);
// pin settings
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
@@ -103,24 +106,22 @@ void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
// set 9600, 8 bits, no parity check, 1 stop bit
USD(EMSUART_UART) = (UART_CLK_FREQ / EMSUART_BAUD);
USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
USC0(EMSUART_UART) = EMSUART_CONFIG;
// flash fifo buffers, not required since we drop the first telegram
// USC0(EMSUART_UART) |= ((1 << UCRXRST) | (1 << UCTXRST)); // set bits
// USC0(EMSUART_UART) &= ~((1 << UCRXRST) | (1 << UCTXRST)); // clear bits
USC0(EMSUART_UART) |= ((1 << UCRXRST) | (1 << UCTXRST)); // set bits
USC0(EMSUART_UART) &= ~((1 << UCRXRST) | (1 << UCTXRST)); // clear bits
// we dont use fifo-full interrupt anymore, no need to set this
//USC1(EMSUART_UART) = (0x7F << UCFFT); // rx buffer full
USIE(EMSUART_UART) = 0; // disable all interrupts
USIC(EMSUART_UART) = 0xFFFF; // clear all interupt flags
// UCFFT = RX FIFO Full Threshold (7 bit) = want this to be more than 32)
USC1(EMSUART_UART) = (0x7F << UCFFT); // rx buffer full
USIE(EMSUART_UART) = 0; // disable all interrupts
USIC(EMSUART_UART) = 0xFFFF; // clear all interupts
// set up interrupt callbacks for Rx
system_os_task(emsuart_recvTask, EMSUART_recvTaskPrio, recvTaskQueue, EMSUART_recvTaskQueueLen);
// disable esp debug which will go to Tx and mess up the line - see https://github.com/espruino/Espruino/issues/655
system_set_os_print(0);
// swap Rx and Tx pins to use GPIO13 (D7) and GPIO15 (D8) respectively
system_uart_swap();
system_set_os_print(0); // disable esp debug which will go to Tx and mess up the line - see https://github.com/espruino/Espruino/issues/655
system_uart_swap(); // swap Rx and Tx pins to use GPIO13 (D7) and GPIO15 (D8) respectively
system_os_task(emsuart_recvTask, EMSUART_recvTaskPrio, recvTaskQueue, EMSUART_recvTaskQueueLen); // set up interrupt callbacks for Rx
ETS_UART_INTR_ATTACH(emsuart_rx_intr_handler, nullptr);
drop_first_rx = true; // drop first telegram since it is incomplete
USIE(EMSUART_UART) = (1 << UIBD); // enable only rx break interrupt
//ETS_UART_INTR_ENABLE();
}
/*
@@ -128,20 +129,30 @@ void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
* This is called prior to an OTA upload and also before a save to the filesystem to prevent conflicts
*/
void ICACHE_FLASH_ATTR EMSuart::stop() {
USIE(EMSUART_UART) = 0; // disable interrup
USIE(EMSUART_UART) = 0; // disable uart interrupt
}
/*
* re-start UART0 driver
*/
void ICACHE_FLASH_ATTR EMSuart::restart() {
USIE(EMSUART_UART) = (1 << UIBD); // enable only rx break
if (USIS(EMSUART_UART) & ((1 << UIBD))) { // if we had a break
USIC(EMSUART_UART) |= (1 << UIBD); // clear the BREAK detect flag
drop_first_rx = true; // and drop first frame
} // otherwise there is the beginning of a valid telegram in the fifo
USIE(EMSUART_UART) = (1 << UIBD); // enable rx break interrupt
}
void EMSuart::send_poll(uint8_t data) {
USC0(EMSUART_UART) &= ~(1 << UCBRK); // clear <BRK> bit
USF(EMSUART_UART) = data;
USC0(EMSUART_UART) |= (1 << UCBRK); // send <BRK> at the end
if (tx_mode_ == EMS_TXMODE_NEW) {
USC0(EMSUART_UART) &= ~(1 << UCBRK); // in doubt clear <BRK> bit
USF(EMSUART_UART) = data;
USC0(EMSUART_UART) |= (1 << UCBRK); // send <BRK> at the end
} else {
USF(EMSUART_UART) = data;
delayMicroseconds(EMSUART_TX_BRK_WAIT);
tx_brk(); // send <BRK>
}
}
/*
@@ -149,15 +160,166 @@ void EMSuart::send_poll(uint8_t data) {
* buf contains the CRC and len is #bytes including the CRC
*/
EMSUART_STATUS ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
if (len) {
if (len == 0) {
return EMS_TX_STATUS_OK; // nothing to send
}
// new code from Michael. See https://github.com/proddy/EMS-ESP/issues/380
if (tx_mode_ == EMS_TXMODE_NEW) {
if ((USS(EMSUART_UART) >> USTXC) & 0xFF) { // buffer not empty
return EMS_TX_WTD_TIMEOUT;
}
USC0(EMSUART_UART) &= ~(1 << UCBRK); // clear <BRK> bit
for (uint8_t i = 0; i < len ; i++) {
USF(EMSUART_UART) = buf[i];
for (uint8_t i = 0; i < len; i++) {
USF(EMSUART_UART) = buf[i]; // fill fifo buffer
}
USC0(EMSUART_UART) |= (1 << UCBRK); // send <BRK> at the end
return EMS_TX_STATUS_OK;
}
return EMS_TX_STATUS_OK;
}
// EMS+ https://github.com/proddy/EMS-ESP/issues/23#
if (tx_mode_ == EMS_TXMODE_EMSPLUS) { // With extra tx delay for EMS+
for (uint8_t i = 0; i < len; i++) {
USF(EMSUART_UART) = buf[i];
delayMicroseconds(EMSUART_TX_BRK_WAIT);
}
tx_brk(); // send <BRK>
return EMS_TX_STATUS_OK;
}
// Junkers logic by @philrich
if (tx_mode_ == EMS_TXMODE_HT3) {
for (uint8_t i = 0; i < len; i++) {
USF(EMSUART_UART) = buf[i];
// just to be safe wait for tx fifo empty (still needed?)
while (((USS(EMSUART_UART) >> USTXC) & 0xff))
;
// wait until bits are sent on wire
delayMicroseconds(EMSUART_TX_WAIT_BYTE - EMSUART_TX_LAG + EMSUART_TX_WAIT_GAP); // 1760
}
tx_brk(); // send <BRK>
return EMS_TX_STATUS_OK;
}
/*
* Logic for tx_mode of 0 (EMS_TXMODE_DEFAULT)
* based on code from https://github.com/proddy/EMS-ESP/issues/103 by @susisstrolch
*
* Logic:
* we emit the whole telegram, with Rx interrupt disabled, collecting busmaster response in FIFO.
* after sending the last char we poll the Rx status until either
* - size(Rx FIFO) == size(Tx-Telegram)
* - <BRK> is detected
* At end of receive we re-enable Rx-INT and send a Tx-BRK in loopback mode.
*
* EMS-Bus error handling
* 1. Busmaster stops echoing on Tx w/o permission
* 2. Busmaster cancel telegram by sending a BRK
*
* Case 1. is handled by a watchdog counter which is reset on each
* Tx attempt. The timeout should be 20x EMSUART_BIT_TIME plus
* some smart guess for processing time on targeted EMS device.
* We set Status to EMS_TX_WTD_TIMEOUT and return
*
* Case 2. is handled via a BRK chk during transmission.
* We set Status to EMS_TX_BRK_DETECT and return
*
*/
EMSUART_STATUS result = EMS_TX_STATUS_OK;
// disable rx interrupt
// clear Rx status register, resetting the Rx FIFO and flush it
ETS_UART_INTR_DISABLE();
USC0(EMSUART_UART) |= (1 << UCRXRST);
emsuart_flush_fifos();
// send the bytes along the serial line
for (uint8_t i = 0; i < len; i++) {
uint16_t wdc = EMS_TX_TO_COUNT; // 1760
volatile uint8_t _usrxc = (USS(EMSUART_UART) >> USRXC) & 0xFF;
USF(EMSUART_UART) = buf[i]; // send each Tx byte
// wait for echo from the busmaster
while (((USS(EMSUART_UART) >> USRXC) & 0xFF) == _usrxc) {
delayMicroseconds(EMSUART_BUSY_WAIT); // burn CPU cycles...
if (--wdc == 0) {
ETS_UART_INTR_ENABLE();
return EMS_TX_WTD_TIMEOUT;
}
if (USIR(EMSUART_UART) & (1 << UIBD)) {
USIC(EMSUART_UART) = (1 << UIBD); // clear BRK detect IRQ
ETS_UART_INTR_ENABLE();
return EMS_TX_BRK_DETECT;
}
}
}
// we got the whole telegram in the Rx buffer
// on Rx-BRK (bus collision), we simply enable Rx and leave it
// otherwise we send the final Tx-BRK in the loopback and re=enable Rx-INT.
// worst case, we'll see an additional Rx-BRK...
if (result == EMS_TX_STATUS_OK) {
// neither bus collision nor timeout - send terminating BRK signal
if (!(USIS(EMSUART_UART) & (1 << UIBD))) {
// no bus collision - send terminating BRK signal
USC0(EMSUART_UART) |= (1 << UCLBE) | (1 << UCBRK); // enable loopback & set <BRK>
// wait until BRK detected...
while (!(USIR(EMSUART_UART) & (1 << UIBD))) {
delayMicroseconds(EMSUART_BIT_TIME);
}
USC0(EMSUART_UART) &= ~((1 << UCBRK) | (1 << UCLBE)); // disable loopback & clear <BRK>
USIC(EMSUART_UART) = (1 << UIBD); // clear BRK detect IRQ
phantomBreak = 1;
}
}
ETS_UART_INTR_ENABLE(); // open up the FIFO again to start receiving
return result; // send the Tx status back
}
/*
* flush everything left over in buffer, this clears both rx and tx FIFOs
*/
void ICACHE_FLASH_ATTR EMSuart::emsuart_flush_fifos() {
uint32_t tmp = ((1 << UCRXRST) | (1 << UCTXRST)); // bit mask
USC0(EMSUART_UART) |= (tmp); // set bits
USC0(EMSUART_UART) &= ~(tmp); // clear bits
}
/*
* Send a BRK signal
* Which is a 11-bit set of zero's (11 cycles)
*/
void ICACHE_FLASH_ATTR EMSuart::tx_brk() {
uint32_t tmp;
// must make sure Tx FIFO is empty
while (((USS(EMSUART_UART) >> USTXC) & 0xFF))
;
tmp = ((1 << UCRXRST) | (1 << UCTXRST)); // bit mask
USC0(EMSUART_UART) |= (tmp); // set bits
USC0(EMSUART_UART) &= ~(tmp); // clear bits
// To create a 11-bit <BRK> we set TXD_BRK bit so the break signal will
// automatically be sent when the tx fifo is empty
tmp = (1 << UCBRK);
USC0(EMSUART_UART) |= (tmp); // set bit
if (tx_mode_ == EMS_TXMODE_EMSPLUS) { // EMS+ mode
delayMicroseconds(EMSUART_TX_BRK_WAIT);
} else if (tx_mode_ == EMS_TXMODE_HT3) { // junkers mode
delayMicroseconds(EMSUART_TX_WAIT_BRK - EMSUART_TX_LAG); // 1144 (11 Bits)
}
USC0(EMSUART_UART) &= ~(tmp); // clear bit
}
} // namespace emsesp
#endif

21
src/uart/emsuart_esp8266.h
View File

@@ -28,14 +28,26 @@
#define EMSUART_BAUD 9600 // uart baud rate for the EMS circuit
#define EMS_MAXBUFFERS 3 // buffers for circular filling to avoid collisions
#define EMS_MAXBUFFERSIZE 33 // max size of the buffer. EMS packets are max 32 bytes, plus extra 2 for BRK
#define EMS_MAXBUFFERSIZE 33 // max size of the buffer. EMS packets are max 32 bytes, plus extra 2 for BRKs
#define EMSUART_recvTaskPrio 1 // 0, 1 or 2. 0 being the lowest
#define EMSUART_recvTaskQueueLen 10 // number of queued'd Rx triggers
#define EMSUART_recvTaskQueueLen 10 // number of queued Rx triggers
#define EMS_TXMODE_DEFAULT 1
#define EMS_TXMODE_EMSPLUS 2
#define EMS_TXMODE_HT3 3
#define EMS_TXMODE_NEW 4 // for michael
// LEGACY
#define EMSUART_BIT_TIME 104 // bit time @9600 baud
#define EMSUART_TX_BRK_WAIT 2070 // the BRK from Boiler master is roughly 1.039ms, so accounting for hardware lag using around 2078 (for half-duplex) - 8 (lag)
#define EMSUART_TX_WAIT_BYTE (EMSUART_BIT_TIME * 10) // Time to send one Byte (8 Bits, 1 Start Bit, 1 Stop Bit)
#define EMSUART_TX_WAIT_BRK (EMSUART_BIT_TIME * 11) // Time to send a BRK Signal (11 Bit)
#define EMSUART_TX_WAIT_GAP (EMSUART_BIT_TIME * 7) // Gap between to Bytes
#define EMSUART_TX_LAG 8
#define EMSUART_BUSY_WAIT (EMSUART_BIT_TIME / 8)
#define EMS_TX_TO_CHARS (2 + 20)
#define EMS_TX_TO_COUNT (EMS_TX_TO_CHARS * 8)
namespace emsesp {
@@ -62,8 +74,11 @@ class EMSuart {
} EMSRxBuf_t;
private:
static void ICACHE_RAM_ATTR emsuart_rx_intr_handler(void * para);
static void ICACHE_RAM_ATTR emsuart_rx_intr_handler(void * para);
static void ICACHE_FLASH_ATTR emsuart_recvTask(os_event_t * events);
static void ICACHE_FLASH_ATTR emsuart_flush_fifos();
static void ICACHE_FLASH_ATTR tx_brk();
};
} // namespace emsesp