mirror of
https://github.com/emsesp/EMS-ESP32.git
synced 2025-12-08 00:39:50 +03:00
roll back changes to 2.0.0 for ESP8266 uart
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@@ -46,9 +46,9 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
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if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk
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if (emsTxBufLen > 0) { // timer tx_mode is interrupted by <brk>
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emsTxBufLen = 0;
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drop_next_rx = true;
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if (emsTxBufIdx < emsTxBufLen) { // irq tx_mode is interrupted by <brk>
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emsTxBufIdx = emsTxBufLen + 1; // stop tx
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// drop_next_rx = true; // we have trash in buffer
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}
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USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
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length = 0;
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@@ -89,9 +89,6 @@ void ICACHE_FLASH_ATTR EMSuart::emsuart_recvTask(os_event_t * events) {
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// ISR to Fire when Timer is triggered
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void ICACHE_RAM_ATTR EMSuart::emsuart_tx_timer_intr_handler() {
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if (emsTxBufLen == 0) {
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return;
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}
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emsTxBufIdx++;
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if (emsTxBufIdx < emsTxBufLen) {
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USF(EMSUART_UART) = emsTxBuf[emsTxBufIdx];
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@@ -101,8 +98,7 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_tx_timer_intr_handler() {
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timer1_write(EMSUART_TX_BRK_TIMER);
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} else {
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset <BRK>
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sending_ = false;
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emsTxBufLen = 0;
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sending_ = false;
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}
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}
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@@ -283,7 +279,7 @@ uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
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/*
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* Logic for tx_mode of 1
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* based on original code from https://github.com/proddy/EMS-ESP/issues/103 by @susisstrolch
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* based on code from https://github.com/proddy/EMS-ESP/issues/103 by @susisstrolch
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*
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* Logic:
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* we emit the whole telegram, with Rx interrupt disabled, collecting busmaster response in FIFO.
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