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https://github.com/emsesp/EMS-ESP32.git
synced 2025-12-08 00:39:50 +03:00
updated with uart branch, Rx brk for ESP8266
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@@ -46,21 +46,25 @@ void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
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if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk
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if (emsTxBufIdx < emsTxBufLen) { // irq tx_mode is interrupted by <brk>
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emsTxBufIdx = emsTxBufLen + 1; // stop tx
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// drop_next_rx = true; // we have trash in buffer
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if (sending_) { // irq tx_mode is interrupted by <brk>, should never happen
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drop_next_rx = true; // we have trash in buffer
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}
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USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
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length = 0;
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while ((USS(EMSUART_UART) >> USRXC) & 0x0FF) { // read fifo into buffer
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uint8_t rx = USF(EMSUART_UART);
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if (length < EMS_MAXBUFFERSIZE) {
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if (length || rx) { // skip a leading zero
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uart_buffer[length++] = rx;
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}
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} else {
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drop_next_rx = true;
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}
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}
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if (!drop_next_rx) {
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if (uart_buffer[length - 1]) { // check if last byte is break
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length++;
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}
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pEMSRxBuf->length = length;
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os_memcpy((void *)pEMSRxBuf->buffer, (void *)&uart_buffer, pEMSRxBuf->length); // copy data into transfer buffer, including the BRK 0x00 at the end
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system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
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@@ -89,6 +93,9 @@ void ICACHE_FLASH_ATTR EMSuart::emsuart_recvTask(os_event_t * events) {
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// ISR to Fire when Timer is triggered
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void ICACHE_RAM_ATTR EMSuart::emsuart_tx_timer_intr_handler() {
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if (!sending_) {
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return;
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}
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emsTxBufIdx++;
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if (emsTxBufIdx < emsTxBufLen) {
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USF(EMSUART_UART) = emsTxBuf[emsTxBufIdx];
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