mirror of
https://github.com/emsesp/EMS-ESP32.git
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initial commit
This commit is contained in:
437
src/uart/emsuart_esp8266.cpp
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437
src/uart/emsuart_esp8266.cpp
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/*
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* EMS-ESP - https://github.com/proddy/EMS-ESP
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* Copyright 2019 Paul Derbyshire
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#if defined(ESP8266)
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#include "uart/emsuart_esp8266.h"
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#include "emsesp.h"
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namespace emsesp {
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os_event_t recvTaskQueue[EMSUART_recvTaskQueueLen]; // our Rx queue
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EMSuart::EMSRxBuf_t * pEMSRxBuf;
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EMSuart::EMSRxBuf_t * paEMSRxBuf[EMS_MAXBUFFERS];
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uint8_t emsRxBufIdx = 0;
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uint8_t tx_mode_ = 0xFF;
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bool drop_next_rx = true;
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uint8_t emsTxBuf[EMS_MAXBUFFERSIZE];
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uint8_t emsTxBufIdx;
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uint8_t emsTxBufLen;
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uint32_t emsTxWait;
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bool EMSuart::sending_ = false;
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//
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// Main interrupt handler
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// Important: must not use ICACHE_FLASH_ATTR
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//
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void ICACHE_RAM_ATTR EMSuart::emsuart_rx_intr_handler(void * para) {
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static uint8_t length = 0;
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static uint8_t uart_buffer[EMS_MAXBUFFERSIZE + 2];
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if (USIS(EMSUART_UART) & ((1 << UIBD))) { // BREAK detection = End of EMS data block
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // reset tx-brk
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if (emsTxBufIdx < emsTxBufLen) { // irq tx_mode is interrupted by <brk>
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emsTxBufIdx = emsTxBufLen; // stop tx
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drop_next_rx = true; // we have trash in buffer
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}
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USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
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USIE(EMSUART_UART) &= ~(1 << UIFF); // disable fifo-full irq
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length = 0;
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while ((USS(EMSUART_UART) >> USRXC) & 0x0FF) { // read fifo into buffer
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uint8_t rx = USF(EMSUART_UART);
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if (length < EMS_MAXBUFFERSIZE) {
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uart_buffer[length++] = rx;
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} else {
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drop_next_rx = true;
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}
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}
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if (!drop_next_rx) {
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pEMSRxBuf->length = length;
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os_memcpy((void *)pEMSRxBuf->buffer, (void *)&uart_buffer, pEMSRxBuf->length); // copy data into transfer buffer, including the BRK 0x00 at the end
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system_os_post(EMSUART_recvTaskPrio, 0, 0); // call emsuart_recvTask() at next opportunity
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}
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drop_next_rx = false;
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sending_ = false;
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}
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}
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/*
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* system task triggered on BRK interrupt
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* incoming received messages are always asynchronous
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* The full buffer is sent to EMSESP::incoming_telegram()
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*/
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void ICACHE_FLASH_ATTR EMSuart::emsuart_recvTask(os_event_t * events) {
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EMSRxBuf_t * pCurrent = pEMSRxBuf;
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pEMSRxBuf = paEMSRxBuf[++emsRxBufIdx % EMS_MAXBUFFERS]; // next free EMS Receive buffer
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uint8_t length = pCurrent->length; // number of bytes including the BRK at the end
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pCurrent->length = 0;
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// Ignore telegrams with no data value, then transmit EMS buffer, excluding the BRK
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if (length > 4 || length == 2) {
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EMSESP::incoming_telegram((uint8_t *)pCurrent->buffer, length - 1);
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}
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}
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/*
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* flush everything left over in buffer, this clears both rx and tx FIFOs
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*/
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void ICACHE_FLASH_ATTR EMSuart::emsuart_flush_fifos() {
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USC0(EMSUART_UART) |= ((1 << UCRXRST) | (1 << UCTXRST)); // set bits
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USC0(EMSUART_UART) &= ~((1 << UCRXRST) | (1 << UCTXRST)); // clear bits
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}
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// ISR to Fire when Timer is triggered
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void ICACHE_RAM_ATTR EMSuart::emsuart_tx_timer_intr_handler() {
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if (tx_mode_ > 50) {
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for (uint8_t i = 0; i < emsTxBufLen; i++) {
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USF(EMSUART_UART) = emsTxBuf[i];
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}
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USC0(EMSUART_UART) |= (1 << UCBRK); // set <BRK>
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} else {
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if (emsTxBufIdx > emsTxBufLen) {
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return;
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}
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if (emsTxBufIdx < emsTxBufLen) {
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USF(EMSUART_UART) = emsTxBuf[emsTxBufIdx];
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timer1_write(emsTxWait);
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} else if (emsTxBufIdx == emsTxBufLen) {
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USC0(EMSUART_UART) |= (1 << UCBRK); // set <BRK>
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}
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emsTxBufIdx++;
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}
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}
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/*
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* init UART0 driver
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*/
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void ICACHE_FLASH_ATTR EMSuart::start(uint8_t tx_mode) {
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if (tx_mode > 50) {
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emsTxWait = 5 * EMSUART_TX_BIT_TIME * (tx_mode - 50); // bittimes wait before sending
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} else if (tx_mode > 5) {
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emsTxWait = 5 * EMSUART_TX_BIT_TIME * (tx_mode + 10); // bittimes wait between bytes
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}
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if (tx_mode_ != 0xFF) { // it's a restart no need to configure uart
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tx_mode_ = tx_mode;
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restart();
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return;
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}
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tx_mode_ = tx_mode;
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// allocate and preset EMS Receive buffers
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for (int i = 0; i < EMS_MAXBUFFERS; i++) {
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EMSRxBuf_t * p = (EMSRxBuf_t *)malloc(sizeof(EMSRxBuf_t));
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p->length = 0;
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paEMSRxBuf[i] = p;
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}
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pEMSRxBuf = paEMSRxBuf[0]; // reset EMS Rx Buffer
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ETS_UART_INTR_DISABLE();
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ETS_UART_INTR_ATTACH(nullptr, nullptr);
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// pin settings
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0RXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
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// set 9600, 8 bits, no parity check, 1 stop bit
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USD(EMSUART_UART) = (UART_CLK_FREQ / EMSUART_BAUD);
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if (tx_mode_ == 5) {
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USC0(EMSUART_UART) = 0x2C; // 8N1.5
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} else {
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USC0(EMSUART_UART) = EMSUART_CONFIG; // 8N1
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}
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emsuart_flush_fifos();
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// conf1 params
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// UCTOE = RX TimeOut enable (default is 1)
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// UCTOT = RX TimeOut Threshold (7 bit) = want this when no more data after 1 characters (default is 2)
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// UCFFT = RX FIFO Full Threshold (7 bit) = want this to be 31 for 32 bytes of buffer (default was 127)
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// see https://www.espressif.com/sites/default/files/documentation/esp8266-technical_reference_en.pdf
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//
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// change: we set UCFFT to 1 to get an immediate indicator about incoming traffic.
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// Otherwise, we're only noticed by UCTOT or RxBRK!
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// change: don't care, we do not use these interrupts
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USC1(EMSUART_UART) = 0; // reset config first
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// USC1(EMSUART_UART) = (0x7F << UCFFT) | (0x01 << UCTOT) | (1 << UCTOE); // enable interupts
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// set interrupts for triggers
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USIC(EMSUART_UART) = 0xFFFF; // clear all interupts
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USIE(EMSUART_UART) = 0; // disable all interrupts
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// enable rx break, fifo full and timeout.
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// but not frame error UIFR (because they are too frequent) or overflow UIOF because our buffer is only max 32 bytes
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// change: we don't care about Rx Timeout - it may lead to wrong readouts
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// change:we don't care about Fifo full and read only on break-detect
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USIE(EMSUART_UART) = (1 << UIBD) | (0 << UIFF) | (0 << UITO);
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// set up interrupt callbacks for Rx
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system_os_task(emsuart_recvTask, EMSUART_recvTaskPrio, recvTaskQueue, EMSUART_recvTaskQueueLen);
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// disable esp debug which will go to Tx and mess up the line - see https://github.com/espruino/Espruino/issues/655
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system_set_os_print(0);
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// swap Rx and Tx pins to use GPIO13 (D7) and GPIO15 (D8) respectively
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system_uart_swap();
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ETS_UART_INTR_ATTACH(emsuart_rx_intr_handler, nullptr);
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ETS_UART_INTR_ENABLE();
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drop_next_rx = true;
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// for sending with large delay in EMS+ mode we use a timer interrupt
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timer1_attachInterrupt(emsuart_tx_timer_intr_handler); // Add ISR Function
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timer1_enable(TIM_DIV16, TIM_EDGE, TIM_SINGLE); // 5 MHz timer
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}
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/*
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* stop UART0 driver
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* This is called prior to an OTA upload and also before a save to the filesystem to prevent conflicts
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*/
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void ICACHE_FLASH_ATTR EMSuart::stop() {
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ETS_UART_INTR_DISABLE();
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timer1_disable();
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}
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/*
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* re-start UART0 driver
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*/
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void ICACHE_FLASH_ATTR EMSuart::restart() {
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if (USIR(EMSUART_UART) & ((1 << UIBD))) {
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USIC(EMSUART_UART) = (1 << UIBD); // INT clear the BREAK detect interrupt
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drop_next_rx = true;
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}
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ETS_UART_INTR_ENABLE();
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emsTxBufIdx = 0;
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emsTxBufLen = 0;
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timer1_enable(TIM_DIV16, TIM_EDGE, TIM_SINGLE);
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}
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/*
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* Send a BRK signal
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* Which is a 11-bit set of zero's (11 cycles)
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*/
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void ICACHE_FLASH_ATTR EMSuart::tx_brk() {
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// make sure Tx FIFO is empty
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while (((USS(EMSUART_UART) >> USTXC) & 0xFF)) {
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}
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// To create a 11-bit <BRK> we set TXD_BRK bit so the break signal will
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// automatically be sent when the tx fifo is empty
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ETS_UART_INTR_DISABLE();
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USC0(EMSUART_UART) |= (1 << UCBRK); // set bit
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// also for EMS+ there is no need to wait longer, we are finished and can free the bus.
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delayMicroseconds(EMSUART_TX_WAIT_BRK); // 1144
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // clear BRK bit
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ETS_UART_INTR_ENABLE();
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}
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/*
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* Sends a 1-byte poll, ending with a <BRK>
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* It's a bit dirty. there is no special wait logic per tx_mode type, fifo flushes or error checking
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*/
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void EMSuart::send_poll(uint8_t data) {
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// reset tx-brk, just in case it is accidentally set
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USC0(EMSUART_UART) &= ~(1 << UCBRK);
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sending_ = true;
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if (tx_mode_ > 50) { // timer controlled modes
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emsTxBuf[0] = data;
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emsTxBufLen = 1;
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timer1_write(emsTxWait);
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} else if (tx_mode_ > 5) { // timer controlled modes
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emsTxBuf[0] = data;
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emsTxBufIdx = 0;
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emsTxBufLen = 1;
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timer1_write(emsTxWait);
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} else if (tx_mode_ == 5) {
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delayMicroseconds(3000);
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USF(EMSUART_UART) = data;
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USC0(EMSUART_UART) |= (1 << UCBRK);
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} else if (tx_mode_ == EMS_TXMODE_NEW) { // hardware controlled modes
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USF(EMSUART_UART) = data;
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USC0(EMSUART_UART) |= (1 << UCBRK);
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} else if (tx_mode_ == EMS_TXMODE_HT3) {
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USF(EMSUART_UART) = data;
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delayMicroseconds(EMSUART_TX_WAIT_HT3);
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tx_brk(); // send <BRK>
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} else if (tx_mode_ == EMS_TXMODE_EMSPLUS) {
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USF(EMSUART_UART) = data;
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delayMicroseconds(EMSUART_TX_WAIT_PLUS);
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tx_brk(); // send <BRK>
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} else {
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// tx_mode 1
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// EMS1.0, same logic as in transmit
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ETS_UART_INTR_DISABLE();
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volatile uint8_t _usrxc = (USS(EMSUART_UART) >> USRXC) & 0xFF;
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USF(EMSUART_UART) = data;
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uint16_t timeoutcnt = EMSUART_TX_TIMEOUT;
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while ((((USS(EMSUART_UART) >> USRXC) & 0xFF) == _usrxc) && (--timeoutcnt > 0)) {
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delayMicroseconds(EMSUART_TX_BUSY_WAIT); // burn CPU cycles...
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}
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USC0(EMSUART_UART) |= (1 << UCBRK); // set <BRK>
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timeoutcnt = EMSUART_TX_TIMEOUT;
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while (!(USIR(EMSUART_UART) & (1 << UIBD)) && (--timeoutcnt > 0)) {
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delayMicroseconds(EMSUART_TX_BUSY_WAIT);
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}
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USC0(EMSUART_UART) &= ~(1 << UCBRK); // clear <BRK>
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ETS_UART_INTR_ENABLE();
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}
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}
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/*
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* Send data to Tx line, ending with a <BRK>
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* buf contains the CRC and len is #bytes including the CRC
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* returns code, 0=success, 1=brk error, 2=watchdog timeout
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*/
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uint16_t ICACHE_FLASH_ATTR EMSuart::transmit(uint8_t * buf, uint8_t len) {
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if (len == 0 || len >= EMS_MAXBUFFERSIZE) {
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return EMS_TX_STATUS_ERR; // nothing or to much to send
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}
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// reset tx-brk, just in case it is accidentally set
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USC0(EMSUART_UART) &= ~(1 << UCBRK);
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sending_ = true;
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// all at once after a inititial timer delay
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if (tx_mode_ > 50) {
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for (uint8_t i = 0; i < len; i++) {
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emsTxBuf[i] = buf[i];
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}
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emsTxBufLen = len;
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timer1_write(emsTxWait);
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return EMS_TX_STATUS_OK;
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}
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// timer controlled modes with extra delay
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if (tx_mode_ > 5) {
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for (uint8_t i = 0; i < len; i++) {
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emsTxBuf[i] = buf[i];
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}
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emsTxBufIdx = 0;
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emsTxBufLen = len;
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timer1_write(emsTxWait);
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return EMS_TX_STATUS_OK;
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}
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// fixed dealy before sending
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if (tx_mode_ == 5) {
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delayMicroseconds(3000);
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for (uint8_t i = 0; i < len; i++) {
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USF(EMSUART_UART) = buf[i];
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}
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USC0(EMSUART_UART) |= (1 << UCBRK); // send <BRK> at the end
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return EMS_TX_STATUS_OK;
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}
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// new code from Michael. See https://github.com/proddy/EMS-ESP/issues/380
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if (tx_mode_ == EMS_TXMODE_NEW) { // tx_mode 4
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for (uint8_t i = 0; i < len; i++) {
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USF(EMSUART_UART) = buf[i];
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}
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USC0(EMSUART_UART) |= (1 << UCBRK); // send <BRK> at the end
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return EMS_TX_STATUS_OK;
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}
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// EMS+ https://github.com/proddy/EMS-ESP/issues/23#
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if (tx_mode_ == EMS_TXMODE_EMSPLUS) { // tx_mode 2, With extra tx delay for EMS+
|
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for (uint8_t i = 0; i < len; i++) {
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USF(EMSUART_UART) = buf[i];
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delayMicroseconds(EMSUART_TX_WAIT_PLUS); // 2070
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}
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tx_brk(); // send <BRK>
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return EMS_TX_STATUS_OK;
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}
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// Junkers logic by @philrich, tx_mode 3
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if (tx_mode_ == EMS_TXMODE_HT3) {
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for (uint8_t i = 0; i < len; i++) {
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USF(EMSUART_UART) = buf[i];
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// just to be safe wait for tx fifo empty (still needed?)
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while (((USS(EMSUART_UART) >> USTXC) & 0xff)) {
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}
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// wait until bits are sent on wire
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delayMicroseconds(EMSUART_TX_WAIT_HT3);
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}
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tx_brk(); // send <BRK>
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return EMS_TX_STATUS_OK;
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}
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/*
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* Logic for tx_mode of 1
|
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* based on code from https://github.com/proddy/EMS-ESP/issues/103 by @susisstrolch
|
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*
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* Logic:
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* we emit the whole telegram, with Rx interrupt disabled, collecting busmaster response in FIFO.
|
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* after sending the last char we poll the Rx status until either
|
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* - size(Rx FIFO) == size(Tx-Telegram)
|
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* - <BRK> is detected
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* At end of receive we re-enable Rx-INT and send a Tx-BRK in loopback mode.
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*
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* EMS-Bus error handling
|
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* 1. Busmaster stops echoing on Tx w/o permission
|
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* 2. Busmaster cancel telegram by sending a BRK
|
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*
|
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* Case 1. is handled by a watchdog counter which is reset on each
|
||||
* Tx attempt. The timeout should be 20x EMSUART_TX_BIT_TIME plus
|
||||
* some smart guess for processing time on targeted EMS device.
|
||||
* We set Status to EMS_TX_WTD_TIMEOUT and return
|
||||
*
|
||||
* Case 2. is handled via a BRK chk during transmission.
|
||||
* We set Status to EMS_TX_BRK_DETECT and return
|
||||
*
|
||||
*/
|
||||
|
||||
// disable rx interrupt
|
||||
// clear Rx status register, resetting the Rx FIFO and flush it
|
||||
ETS_UART_INTR_DISABLE();
|
||||
emsuart_flush_fifos();
|
||||
|
||||
// send the bytes along the serial line
|
||||
for (uint8_t i = 0; i < len; i++) {
|
||||
volatile uint8_t _usrxc = (USS(EMSUART_UART) >> USRXC) & 0xFF;
|
||||
uint16_t timeoutcnt = EMSUART_TX_TIMEOUT;
|
||||
USF(EMSUART_UART) = buf[i]; // send each Tx byte
|
||||
// wait for echo
|
||||
while ((((USS(EMSUART_UART) >> USRXC) & 0xFF) == _usrxc) && (--timeoutcnt > 0)) {
|
||||
delayMicroseconds(EMSUART_TX_BUSY_WAIT); // burn CPU cycles...
|
||||
}
|
||||
}
|
||||
|
||||
// we got the whole telegram in the Rx buffer
|
||||
// on Rx-BRK (bus collision), we simply enable Rx and leave it
|
||||
// otherwise we send the final Tx-BRK in the loopback and re=enable Rx-INT.
|
||||
// worst case, we'll see an additional Rx-BRK...
|
||||
// neither bus collision nor timeout - send terminating BRK signal
|
||||
if (!(USIS(EMSUART_UART) & (1 << UIBD))) {
|
||||
// no bus collision - send terminating BRK signal
|
||||
USC0(EMSUART_UART) |= (1 << UCBRK); // set <BRK>
|
||||
uint16_t timeoutcnt = EMSUART_TX_TIMEOUT;
|
||||
// wait until BRK detected...
|
||||
while (!(USIR(EMSUART_UART) & (1 << UIBD)) && (--timeoutcnt > 0)) {
|
||||
delayMicroseconds(EMSUART_TX_BUSY_WAIT);
|
||||
}
|
||||
|
||||
USC0(EMSUART_UART) &= ~(1 << UCBRK); // clear <BRK>
|
||||
}
|
||||
|
||||
ETS_UART_INTR_ENABLE(); // open up the FIFO again to start receiving
|
||||
return EMS_TX_STATUS_OK; // send the Tx ok status back
|
||||
}
|
||||
|
||||
} // namespace emsesp
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user