Merge pull request #1792 from proddy/feat_modules

Feat modules
This commit is contained in:
Proddy
2024-06-09 14:03:45 +02:00
committed by GitHub
6 changed files with 174 additions and 200 deletions

View File

@@ -167,6 +167,7 @@ const Modules: FC = () => {
const colorStatus = (status: number) => { const colorStatus = (status: number) => {
if (status === 1) { if (status === 1) {
// TODO translate
return <div style={{ color: 'red' }}>Pending Activation</div>; return <div style={{ color: 'red' }}>Pending Activation</div>;
} }
return <div style={{ color: '#00FF7F' }}>Activated</div>; return <div style={{ color: '#00FF7F' }}>Activated</div>;

View File

@@ -54,7 +54,7 @@ const ModulesDialog = ({
}; };
return ( return (
<Dialog sx={dialogStyle} open={open} onClose={onClose}> <Dialog sx={dialogStyle} fullWidth maxWidth="xs" open={open} onClose={onClose}>
<DialogTitle>{LL.EDIT() + ' ' + editItem.key}</DialogTitle> <DialogTitle>{LL.EDIT() + ' ' + editItem.key}</DialogTitle>
<DialogContent dividers> <DialogContent dividers>
<Grid container> <Grid container>
@@ -66,15 +66,17 @@ const ModulesDialog = ({
name="enabled" name="enabled"
/> />
} }
label={LL.ACTIVE()} // TODO translate
label="Enabled"
/> />
</Grid> </Grid>
<Box mt={1} mb={1}> <Box mt={2} mb={1}>
<TextField <TextField
name="license" name="license"
label="License Key" label="License Key"
multiline multiline
rows={6} rows={6}
columns={40}
fullWidth fullWidth
value={editItem.license} value={editItem.license}
onChange={updateFormValue} onChange={updateFormValue}

View File

@@ -65,22 +65,22 @@
#define IO_REG_BASE_ATTR asm("r30") #define IO_REG_BASE_ATTR asm("r30")
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
#define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0) #define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0)
#define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) &= ~(mask)) #define DIRECT_MODE_INPUT(base, mask) ((*((base) + 1)) &= ~(mask))
#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+1)) |= (mask)) #define DIRECT_MODE_OUTPUT(base, mask) ((*((base) + 1)) |= (mask))
#define DIRECT_WRITE_LOW(base, mask) ((*((base)+2)) &= ~(mask)) #define DIRECT_WRITE_LOW(base, mask) ((*((base) + 2)) &= ~(mask))
#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+2)) |= (mask)) #define DIRECT_WRITE_HIGH(base, mask) ((*((base) + 2)) |= (mask))
#elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__) #elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__)
#define PIN_TO_BASEREG(pin) (portOutputRegister(pin)) #define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
#define PIN_TO_BITMASK(pin) (1) #define PIN_TO_BITMASK(pin) (1)
#define IO_REG_TYPE uint8_t #define IO_REG_TYPE uint8_t
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR __attribute__ ((unused)) #define IO_REG_MASK_ATTR __attribute__((unused))
#define DIRECT_READ(base, mask) (*((base)+512)) #define DIRECT_READ(base, mask) (*((base) + 512))
#define DIRECT_MODE_INPUT(base, mask) (*((base)+640) = 0) #define DIRECT_MODE_INPUT(base, mask) (*((base) + 640) = 0)
#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+640) = 1) #define DIRECT_MODE_OUTPUT(base, mask) (*((base) + 640) = 1)
#define DIRECT_WRITE_LOW(base, mask) (*((base)+256) = 1) #define DIRECT_WRITE_LOW(base, mask) (*((base) + 256) = 1)
#define DIRECT_WRITE_HIGH(base, mask) (*((base)+128) = 1) #define DIRECT_WRITE_HIGH(base, mask) (*((base) + 128) = 1)
#elif defined(__MKL26Z64__) #elif defined(__MKL26Z64__)
#define PIN_TO_BASEREG(pin) (portOutputRegister(pin)) #define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
@@ -88,11 +88,11 @@
#define IO_REG_TYPE uint8_t #define IO_REG_TYPE uint8_t
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
#define DIRECT_READ(base, mask) ((*((base)+16) & (mask)) ? 1 : 0) #define DIRECT_READ(base, mask) ((*((base) + 16) & (mask)) ? 1 : 0)
#define DIRECT_MODE_INPUT(base, mask) (*((base)+20) &= ~(mask)) #define DIRECT_MODE_INPUT(base, mask) (*((base) + 20) &= ~(mask))
#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+20) |= (mask)) #define DIRECT_MODE_OUTPUT(base, mask) (*((base) + 20) |= (mask))
#define DIRECT_WRITE_LOW(base, mask) (*((base)+8) = (mask)) #define DIRECT_WRITE_LOW(base, mask) (*((base) + 8) = (mask))
#define DIRECT_WRITE_HIGH(base, mask) (*((base)+4) = (mask)) #define DIRECT_WRITE_HIGH(base, mask) (*((base) + 4) = (mask))
#elif defined(__SAM3X8E__) || defined(__SAM3A8C__) || defined(__SAM3A4C__) #elif defined(__SAM3X8E__) || defined(__SAM3A8C__) || defined(__SAM3A4C__)
// Arduino 1.5.1 may have a bug in delayMicroseconds() on Arduino Due. // Arduino 1.5.1 may have a bug in delayMicroseconds() on Arduino Due.
@@ -104,11 +104,11 @@
#define IO_REG_TYPE uint32_t #define IO_REG_TYPE uint32_t
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
#define DIRECT_READ(base, mask) (((*((base)+15)) & (mask)) ? 1 : 0) #define DIRECT_READ(base, mask) (((*((base) + 15)) & (mask)) ? 1 : 0)
#define DIRECT_MODE_INPUT(base, mask) ((*((base)+5)) = (mask)) #define DIRECT_MODE_INPUT(base, mask) ((*((base) + 5)) = (mask))
#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+4)) = (mask)) #define DIRECT_MODE_OUTPUT(base, mask) ((*((base) + 4)) = (mask))
#define DIRECT_WRITE_LOW(base, mask) ((*((base)+13)) = (mask)) #define DIRECT_WRITE_LOW(base, mask) ((*((base) + 13)) = (mask))
#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+12)) = (mask)) #define DIRECT_WRITE_HIGH(base, mask) ((*((base) + 12)) = (mask))
#ifndef PROGMEM #ifndef PROGMEM
#define PROGMEM #define PROGMEM
#endif #endif
@@ -122,11 +122,11 @@
#define IO_REG_TYPE uint32_t #define IO_REG_TYPE uint32_t
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
#define DIRECT_READ(base, mask) (((*(base+4)) & (mask)) ? 1 : 0) //PORTX + 0x10 #define DIRECT_READ(base, mask) (((*(base + 4)) & (mask)) ? 1 : 0) //PORTX + 0x10
#define DIRECT_MODE_INPUT(base, mask) ((*(base+2)) = (mask)) //TRISXSET + 0x08 #define DIRECT_MODE_INPUT(base, mask) ((*(base + 2)) = (mask)) //TRISXSET + 0x08
#define DIRECT_MODE_OUTPUT(base, mask) ((*(base+1)) = (mask)) //TRISXCLR + 0x04 #define DIRECT_MODE_OUTPUT(base, mask) ((*(base + 1)) = (mask)) //TRISXCLR + 0x04
#define DIRECT_WRITE_LOW(base, mask) ((*(base+8+1)) = (mask)) //LATXCLR + 0x24 #define DIRECT_WRITE_LOW(base, mask) ((*(base + 8 + 1)) = (mask)) //LATXCLR + 0x24
#define DIRECT_WRITE_HIGH(base, mask) ((*(base+8+2)) = (mask)) //LATXSET + 0x28 #define DIRECT_WRITE_HIGH(base, mask) ((*(base + 8 + 2)) = (mask)) //LATXSET + 0x28
#elif defined(ARDUINO_ARCH_ESP8266) #elif defined(ARDUINO_ARCH_ESP8266)
// Special note: I depend on the ESP community to maintain these definitions and // Special note: I depend on the ESP community to maintain these definitions and
@@ -134,7 +134,7 @@
// resolve any problems related to ESP chips. Please do not contact me and please // resolve any problems related to ESP chips. Please do not contact me and please
// DO NOT CREATE GITHUB ISSUES for ESP support. All ESP questions must be asked // DO NOT CREATE GITHUB ISSUES for ESP support. All ESP questions must be asked
// on ESP community forums. // on ESP community forums.
#define PIN_TO_BASEREG(pin) ((volatile uint32_t*) GPO) #define PIN_TO_BASEREG(pin) ((volatile uint32_t *)GPO)
#define PIN_TO_BITMASK(pin) (1 << pin) #define PIN_TO_BITMASK(pin) (1 << pin)
#define IO_REG_TYPE uint32_t #define IO_REG_TYPE uint32_t
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
@@ -147,6 +147,7 @@
#elif defined(ARDUINO_ARCH_ESP32) #elif defined(ARDUINO_ARCH_ESP32)
#include <driver/rtc_io.h> #include <driver/rtc_io.h>
#include <soc/gpio_struct.h>
#if ESP_IDF_VERSION_MAJOR >= 5 #if ESP_IDF_VERSION_MAJOR >= 5
#include "soc/gpio_periph.h" #include "soc/gpio_periph.h"
#endif // ESP_IDF_VERSION_MAJOR >= 5 #endif // ESP_IDF_VERSION_MAJOR >= 5
@@ -156,9 +157,7 @@
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) IO_REG_TYPE directRead(IO_REG_TYPE pin) {
IO_REG_TYPE directRead(IO_REG_TYPE pin)
{
// return digitalRead(pin); // Works most of the time // return digitalRead(pin); // Works most of the time
// return gpio_ll_get_level(&GPIO, pin); // The hal is not public api, don't use in application code // return gpio_ll_get_level(&GPIO, pin); // The hal is not public api, don't use in application code
@@ -166,18 +165,15 @@ IO_REG_TYPE directRead(IO_REG_TYPE pin)
#if SOC_GPIO_PIN_COUNT <= 32 #if SOC_GPIO_PIN_COUNT <= 32
return (GPIO.in.val >> pin) & 0x1; return (GPIO.in.val >> pin) & 0x1;
#else // ESP32 with over 32 gpios #else // ESP32 with over 32 gpios
if ( pin < 32 ) if (pin < 32)
return (GPIO.in >> pin) & 0x1; return (GPIO.in >> pin) & 0x1;
else else
return (GPIO.in1.val >> (pin - 32)) & 0x1; return (GPIO.in1.val >> (pin - 32)) & 0x1;
#endif #endif
return 0; return 0;
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directWriteLow(IO_REG_TYPE pin) {
void directWriteLow(IO_REG_TYPE pin)
{
// digitalWrite(pin, 0); // Works most of the time // digitalWrite(pin, 0); // Works most of the time
// gpio_ll_set_level(&GPIO, pin, 0); // The hal is not public api, don't use in application code // gpio_ll_set_level(&GPIO, pin, 0); // The hal is not public api, don't use in application code
@@ -185,16 +181,14 @@ void directWriteLow(IO_REG_TYPE pin)
#if SOC_GPIO_PIN_COUNT <= 32 #if SOC_GPIO_PIN_COUNT <= 32
GPIO.out_w1tc.val = ((uint32_t)1 << pin); GPIO.out_w1tc.val = ((uint32_t)1 << pin);
#else // ESP32 with over 32 gpios #else // ESP32 with over 32 gpios
if ( pin < 32 ) if (pin < 32)
GPIO.out_w1tc = ((uint32_t)1 << pin); GPIO.out_w1tc = ((uint32_t)1 << pin);
else else
GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32)); GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));
#endif #endif
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directWriteHigh(IO_REG_TYPE pin) {
void directWriteHigh(IO_REG_TYPE pin)
{
// digitalWrite(pin, 1); // Works most of the time // digitalWrite(pin, 1); // Works most of the time
// gpio_ll_set_level(&GPIO, pin, 1); // The hal is not public api, don't use in application code // gpio_ll_set_level(&GPIO, pin, 1); // The hal is not public api, don't use in application code
@@ -202,56 +196,47 @@ void directWriteHigh(IO_REG_TYPE pin)
#if SOC_GPIO_PIN_COUNT <= 32 #if SOC_GPIO_PIN_COUNT <= 32
GPIO.out_w1ts.val = ((uint32_t)1 << pin); GPIO.out_w1ts.val = ((uint32_t)1 << pin);
#else // ESP32 with over 32 gpios #else // ESP32 with over 32 gpios
if ( pin < 32 ) if (pin < 32)
GPIO.out_w1ts = ((uint32_t)1 << pin); GPIO.out_w1ts = ((uint32_t)1 << pin);
else else
GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32)); GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));
#endif #endif
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directModeInput(IO_REG_TYPE pin) {
void directModeInput(IO_REG_TYPE pin) // pinMode(pin, INPUT); // Too slow - doesn't work
{ // gpio_ll_output_disable(&GPIO, pin); // The hal is not public api, don't use in application code
// pinMode(pin, INPUT); // Too slow - doesn't work
// gpio_ll_output_disable(&GPIO, pin); // The hal is not public api, don't use in application code
if ( digitalPinIsValid(pin) ) if (digitalPinIsValid(pin)) {
{
// Input // Input
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 //#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32 #if SOC_GPIO_PIN_COUNT <= 32
GPIO.enable_w1tc.val = ((uint32_t)1 << (pin)); GPIO.enable_w1tc.val = ((uint32_t)1 << (pin));
#else // ESP32 with over 32 gpios #else // ESP32 with over 32 gpios
if ( pin < 32 ) if (pin < 32)
GPIO.enable_w1tc = ((uint32_t)1 << pin); GPIO.enable_w1tc = ((uint32_t)1 << pin);
else else
GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32)); GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));
#endif #endif
} }
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directModeOutput(IO_REG_TYPE pin) {
void directModeOutput(IO_REG_TYPE pin) // pinMode(pin, OUTPUT); // Too slow - doesn't work
{ // gpio_ll_output_enable(&GPIO, pin); // The hal is not public api, don't use in application code
// pinMode(pin, OUTPUT); // Too slow - doesn't work
// gpio_ll_output_enable(&GPIO, pin); // The hal is not public api, don't use in application code
if ( digitalPinCanOutput(pin) ) if (digitalPinCanOutput(pin)) {
{
// Output // Output
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 //#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
#if SOC_GPIO_PIN_COUNT <= 32 #if SOC_GPIO_PIN_COUNT <= 32
GPIO.enable_w1ts.val = ((uint32_t)1 << (pin)); GPIO.enable_w1ts.val = ((uint32_t)1 << (pin));
#else // ESP32 with over 32 gpios #else // ESP32 with over 32 gpios
if ( pin < 32 ) if (pin < 32)
GPIO.enable_w1ts = ((uint32_t)1 << pin); GPIO.enable_w1ts = ((uint32_t)1 << pin);
else else
GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32)); GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));
#endif #endif
} }
} }
#define DIRECT_READ(base, pin) directRead(pin) #define DIRECT_READ(base, pin) directRead(pin)
@@ -266,11 +251,11 @@ void directModeOutput(IO_REG_TYPE pin)
#define IO_REG_TYPE uint32_t #define IO_REG_TYPE uint32_t
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
#define DIRECT_READ(base, mask) (((*((base)+8)) & (mask)) ? 1 : 0) #define DIRECT_READ(base, mask) (((*((base) + 8)) & (mask)) ? 1 : 0)
#define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) = (mask)) #define DIRECT_MODE_INPUT(base, mask) ((*((base) + 1)) = (mask))
#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+2)) = (mask)) #define DIRECT_MODE_OUTPUT(base, mask) ((*((base) + 2)) = (mask))
#define DIRECT_WRITE_LOW(base, mask) ((*((base)+5)) = (mask)) #define DIRECT_WRITE_LOW(base, mask) ((*((base) + 5)) = (mask))
#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+6)) = (mask)) #define DIRECT_WRITE_HIGH(base, mask) ((*((base) + 6)) = (mask))
#elif defined(RBL_NRF51822) #elif defined(RBL_NRF51822)
#define PIN_TO_BASEREG(pin) (0) #define PIN_TO_BASEREG(pin) (0)
@@ -305,9 +290,7 @@ void directModeOutput(IO_REG_TYPE pin)
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) IO_REG_TYPE directRead(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
{
IO_REG_TYPE ret; IO_REG_TYPE ret;
if (SS_GPIO == GPIO_TYPE(pin)) { if (SS_GPIO == GPIO_TYPE(pin)) {
ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS)); ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));
@@ -317,31 +300,23 @@ IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
return ((ret >> GPIO_ID(pin)) & 0x01); return ((ret >> GPIO_ID(pin)) & 0x01);
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directModeInput(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
void directModeInput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
{
if (SS_GPIO == GPIO_TYPE(pin)) { if (SS_GPIO == GPIO_TYPE(pin)) {
WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)), WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)), ((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
} else { } else {
MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin)); MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));
} }
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directModeOutput(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
void directModeOutput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
{
if (SS_GPIO == GPIO_TYPE(pin)) { if (SS_GPIO == GPIO_TYPE(pin)) {
WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)), WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)), ((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
} else { } else {
MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin)); MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));
} }
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directWriteLow(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
{
if (SS_GPIO == GPIO_TYPE(pin)) { if (SS_GPIO == GPIO_TYPE(pin)) {
WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base); WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);
} else { } else {
@@ -349,9 +324,7 @@ void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
} }
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directWriteHigh(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
{
if (SS_GPIO == GPIO_TYPE(pin)) { if (SS_GPIO == GPIO_TYPE(pin)) {
WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base); WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);
} else { } else {
@@ -380,15 +353,11 @@ void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
#define IO_REG_BASE_ATTR #define IO_REG_BASE_ATTR
#define IO_REG_MASK_ATTR #define IO_REG_MASK_ATTR
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) IO_REG_TYPE directRead(IO_REG_TYPE mask) {
IO_REG_TYPE directRead(IO_REG_TYPE mask)
{
return ((GPIO_REG(GPIO_INPUT_VAL) & mask) != 0) ? 1 : 0; return ((GPIO_REG(GPIO_INPUT_VAL) & mask) != 0) ? 1 : 0;
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directModeInput(IO_REG_TYPE mask) {
void directModeInput(IO_REG_TYPE mask)
{
GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask; GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
GPIO_REG(GPIO_IOF_EN) &= ~mask; GPIO_REG(GPIO_IOF_EN) &= ~mask;
@@ -396,9 +365,7 @@ void directModeInput(IO_REG_TYPE mask)
GPIO_REG(GPIO_OUTPUT_EN) &= ~mask; GPIO_REG(GPIO_OUTPUT_EN) &= ~mask;
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directModeOutput(IO_REG_TYPE mask) {
void directModeOutput(IO_REG_TYPE mask)
{
GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask; GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
GPIO_REG(GPIO_IOF_EN) &= ~mask; GPIO_REG(GPIO_IOF_EN) &= ~mask;
@@ -406,15 +373,11 @@ void directModeOutput(IO_REG_TYPE mask)
GPIO_REG(GPIO_OUTPUT_EN) |= mask; GPIO_REG(GPIO_OUTPUT_EN) |= mask;
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directWriteLow(IO_REG_TYPE mask) {
void directWriteLow(IO_REG_TYPE mask)
{
GPIO_REG(GPIO_OUTPUT_VAL) &= ~mask; GPIO_REG(GPIO_OUTPUT_VAL) &= ~mask;
} }
static inline __attribute__((always_inline)) static inline __attribute__((always_inline)) void directWriteHigh(IO_REG_TYPE mask) {
void directWriteHigh(IO_REG_TYPE mask)
{
GPIO_REG(GPIO_OUTPUT_VAL) |= mask; GPIO_REG(GPIO_OUTPUT_VAL) |= mask;
} }
@@ -433,18 +396,17 @@ void directWriteHigh(IO_REG_TYPE mask)
#define DIRECT_READ(base, pin) digitalRead(pin) #define DIRECT_READ(base, pin) digitalRead(pin)
#define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW) #define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW)
#define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH) #define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH)
#define DIRECT_MODE_INPUT(base, pin) pinMode(pin,INPUT) #define DIRECT_MODE_INPUT(base, pin) pinMode(pin, INPUT)
#define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin,OUTPUT) #define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin, OUTPUT)
#warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture." #warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture."
#endif #endif
class OneWire class OneWire {
{
private: private:
IO_REG_TYPE bitmask; IO_REG_TYPE bitmask;
volatile IO_REG_TYPE *baseReg; volatile IO_REG_TYPE * baseReg;
#if ONEWIRE_SEARCH #if ONEWIRE_SEARCH
// global search state // global search state
@@ -455,8 +417,11 @@ class OneWire
#endif #endif
public: public:
OneWire() { } OneWire() {
OneWire(uint8_t pin) { begin(pin); } }
OneWire(uint8_t pin) {
begin(pin);
}
void begin(uint8_t pin); void begin(uint8_t pin);
// OneWire( uint8_t pin); // OneWire( uint8_t pin);
@@ -477,12 +442,12 @@ class OneWire
// another read or write. // another read or write.
void write(uint8_t v, uint8_t power = 0); void write(uint8_t v, uint8_t power = 0);
void write_bytes(const uint8_t *buf, uint16_t count, bool power = 0); void write_bytes(const uint8_t * buf, uint16_t count, bool power = 0);
// Read a byte. // Read a byte.
uint8_t read(void); uint8_t read(void);
void read_bytes(uint8_t *buf, uint16_t count); void read_bytes(uint8_t * buf, uint16_t count);
// Write a bit. The bus is always left powered at the end, see // Write a bit. The bus is always left powered at the end, see
// note in write() about that. // note in write() about that.
@@ -512,13 +477,13 @@ class OneWire
// might be a good idea to check the CRC to make sure you didn't // might be a good idea to check the CRC to make sure you didn't
// get garbage. The order is deterministic. You will always get // get garbage. The order is deterministic. You will always get
// the same devices in the same order. // the same devices in the same order.
uint8_t search(uint8_t *newAddr, bool search_mode = true); uint8_t search(uint8_t * newAddr, bool search_mode = true);
#endif #endif
#if ONEWIRE_CRC #if ONEWIRE_CRC
// Compute a Dallas Semiconductor 8 bit CRC, these are used in the // Compute a Dallas Semiconductor 8 bit CRC, these are used in the
// ROM and scratchpad registers. // ROM and scratchpad registers.
static uint8_t crc8(const uint8_t *addr, uint8_t len); static uint8_t crc8(const uint8_t * addr, uint8_t len);
#if ONEWIRE_CRC16 #if ONEWIRE_CRC16
// Compute the 1-Wire CRC16 and compare it against the received CRC. // Compute the 1-Wire CRC16 and compare it against the received CRC.
@@ -541,7 +506,7 @@ class OneWire
// *not* at a 16-bit integer. // *not* at a 16-bit integer.
// @param crc - The crc starting value (optional) // @param crc - The crc starting value (optional)
// @return True, iff the CRC matches. // @return True, iff the CRC matches.
static bool check_crc16(const uint8_t* input, uint16_t len, const uint8_t* inverted_crc, uint16_t crc = 0); static bool check_crc16(const uint8_t * input, uint16_t len, const uint8_t * inverted_crc, uint16_t crc = 0);
// Compute a Dallas Semiconductor 16 bit CRC. This is required to check // Compute a Dallas Semiconductor 16 bit CRC. This is required to check
// the integrity of data received from many 1-Wire devices. Note that the // the integrity of data received from many 1-Wire devices. Note that the
@@ -555,7 +520,7 @@ class OneWire
// @param len - How many bytes to use. // @param len - How many bytes to use.
// @param crc - The crc starting value (optional) // @param crc - The crc starting value (optional)
// @return The CRC16, as defined by Dallas Semiconductor. // @return The CRC16, as defined by Dallas Semiconductor.
static uint16_t crc16(const uint8_t* input, uint16_t len, uint16_t crc = 0); static uint16_t crc16(const uint8_t * input, uint16_t len, uint16_t crc = 0);
#endif #endif
#endif #endif
}; };

View File

@@ -138,7 +138,7 @@ void TelnetService::loop() {
} }
} }
WiFiClient client = server_.available(); WiFiClient client = server_.accept();
if (client) { if (client) {
if (connections_.size() >= maximum_connections_) { if (connections_.size() >= maximum_connections_) {
#if UUID_TELNET_HAVE_WIFICLIENT_REMOTE #if UUID_TELNET_HAVE_WIFICLIENT_REMOTE

View File

@@ -2144,7 +2144,7 @@ let emsesp_modules = {
"version": "1.0.0", "version": "1.0.0",
"enabled": true, "enabled": true,
"status": 1, "status": 1,
"message": "Ready", "message": "Running",
"license": "1234567890" "license": "1234567890"
}, },
{ {
@@ -2155,7 +2155,7 @@ let emsesp_modules = {
"version": "1.0.0", "version": "1.0.0",
"enabled": true, "enabled": true,
"status": 2, "status": 2,
"message": "Ready", "message": "Running",
"license": "ABCDEFGHIJKL" "license": "ABCDEFGHIJKL"
} }

View File

@@ -6,13 +6,14 @@
default_envs = lolin_s3 default_envs = lolin_s3
; default_envs = esp32_16M ; default_envs = esp32_16M
; default_envs = standalone ; default_envs = standalone
; default_envs = espressi32_v3
extra_configs = extra_configs =
factory_settings.ini factory_settings.ini
pio_local.ini pio_local.ini
[common] [common]
core_build_flags = -std=gnu++2a -Isrc core_build_flags = -std=gnu++2a -Isrc -Wno-type-limits
core_unbuild_flags = -std=gnu++11 core_unbuild_flags = -std=gnu++11
; my_build_flags is set in pio_local.ini ; my_build_flags is set in pio_local.ini
@@ -37,7 +38,7 @@ unbuild_flags =
${common.core_unbuild_flags} ${common.core_unbuild_flags}
[espressi32_base] [espressi32_base]
platform = espressif32@6.7.0 platform = espressif32
framework = arduino framework = arduino
board_build.filesystem = littlefs board_build.filesystem = littlefs
build_flags = build_flags =
@@ -50,9 +51,9 @@ extra_scripts =
[espressi32_base_tasmota] [espressi32_base_tasmota]
; use Tasmota's library which removes some unused libs (like mbedtsl, so no WiFi_secure.h) and increases available heap ; use Tasmota's library which removes some unused libs (like mbedtsl, so no WiFi_secure.h) and increases available heap
; Tasmota Arduino Core 2.0.17 with IPv6 support, based on IDF 4.4.7 ; Tasmota Arduino Core 2.0.17 with IPv6 support, based on IDF 4.4.7
platform = https://github.com/tasmota/platform-espressif32/releases/download/2024.05.00/platform-espressif32.zip ; platform = https://github.com/tasmota/platform-espressif32/releases/download/2024.05.00/platform-espressif32.zip
; Tasmota Arduino Core 3.0.0.240529 based on IDF v5.1.4.240528 ; Tasmota Arduino Core 3.0.1.240605 based on IDF v5.1.4.240602
; platform = https://github.com/tasmota/platform-espressif32/releases/download/2024.05.13/platform-espressif32.zip platform = https://github.com/tasmota/platform-espressif32/releases/download/2024.06.10/platform-espressif32.zip
framework = arduino framework = arduino
board_build.filesystem = littlefs board_build.filesystem = littlefs
build_flags = build_flags =
@@ -79,8 +80,9 @@ lib_deps =
bblanchon/ArduinoJson@^7.0.4 bblanchon/ArduinoJson@^7.0.4
; build for GitHub Actions CI ; build for GitHub Actions CI
; the Web interface is built seperately, so is skipper in extra_scripts ; the Web interface is built seperately, so is skipped in extra_scripts
[env:ci] [env:ci]
; 4MB using Tasmota (no SSL)
extends = espressi32_base_tasmota extends = espressi32_base_tasmota
extra_scripts = scripts/rename_fw.py extra_scripts = scripts/rename_fw.py
board = esp32dev board = esp32dev
@@ -88,6 +90,7 @@ board_build.partitions = esp32_partition_4M.csv
board_build.extra_flags = -DBOARD_HAS_PSRAM board_build.extra_flags = -DBOARD_HAS_PSRAM
[env:ci_s3] [env:ci_s3]
; 16MB ESP32-S3
extends = espressi32_base extends = espressi32_base
extra_scripts = scripts/rename_fw.py extra_scripts = scripts/rename_fw.py
board = lolin_s3 board = lolin_s3
@@ -100,6 +103,7 @@ build_flags =
'-DEMSESP_DEFAULT_BOARD_PROFILE="S32S3"' '-DEMSESP_DEFAULT_BOARD_PROFILE="S32S3"'
[env:ci_16M] [env:ci_16M]
; 16MB ESP32 with PSRAM
extends = espressi32_base extends = espressi32_base
extra_scripts = scripts/rename_fw.py extra_scripts = scripts/rename_fw.py
board = esp32dev board = esp32dev
@@ -109,6 +113,8 @@ build_flags =
${espressi32_base.build_flags} ${espressi32_base.build_flags}
'-DEMSESP_DEFAULT_BOARD_PROFILE="E32V2"' '-DEMSESP_DEFAULT_BOARD_PROFILE="E32V2"'
; Direct builds
[env:esp32_4M] [env:esp32_4M]
extends = espressi32_base_tasmota extends = espressi32_base_tasmota
board = esp32dev board = esp32dev