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@@ -65,22 +65,22 @@
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#define IO_REG_BASE_ATTR asm("r30")
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#define IO_REG_BASE_ATTR asm("r30")
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#define IO_REG_MASK_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0)
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#define DIRECT_READ(base, mask) (((*(base)) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) &= ~(mask))
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#define DIRECT_MODE_INPUT(base, mask) ((*((base) + 1)) &= ~(mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+1)) |= (mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base) + 1)) |= (mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base)+2)) &= ~(mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base) + 2)) &= ~(mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+2)) |= (mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base) + 2)) |= (mask))
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#elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__)
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#elif defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK66FX1M0__) || defined(__MK64FX512__)
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#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
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#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
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#define PIN_TO_BITMASK(pin) (1)
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#define PIN_TO_BITMASK(pin) (1)
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#define IO_REG_TYPE uint8_t
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#define IO_REG_TYPE uint8_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR __attribute__ ((unused))
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#define IO_REG_MASK_ATTR __attribute__((unused))
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#define DIRECT_READ(base, mask) (*((base)+512))
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#define DIRECT_READ(base, mask) (*((base) + 512))
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#define DIRECT_MODE_INPUT(base, mask) (*((base)+640) = 0)
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#define DIRECT_MODE_INPUT(base, mask) (*((base) + 640) = 0)
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#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+640) = 1)
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#define DIRECT_MODE_OUTPUT(base, mask) (*((base) + 640) = 1)
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#define DIRECT_WRITE_LOW(base, mask) (*((base)+256) = 1)
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#define DIRECT_WRITE_LOW(base, mask) (*((base) + 256) = 1)
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#define DIRECT_WRITE_HIGH(base, mask) (*((base)+128) = 1)
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#define DIRECT_WRITE_HIGH(base, mask) (*((base) + 128) = 1)
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#elif defined(__MKL26Z64__)
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#elif defined(__MKL26Z64__)
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#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
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#define PIN_TO_BASEREG(pin) (portOutputRegister(pin))
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@@ -88,11 +88,11 @@
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#define IO_REG_TYPE uint8_t
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#define IO_REG_TYPE uint8_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) ((*((base)+16) & (mask)) ? 1 : 0)
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#define DIRECT_READ(base, mask) ((*((base) + 16) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) (*((base)+20) &= ~(mask))
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#define DIRECT_MODE_INPUT(base, mask) (*((base) + 20) &= ~(mask))
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#define DIRECT_MODE_OUTPUT(base, mask) (*((base)+20) |= (mask))
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#define DIRECT_MODE_OUTPUT(base, mask) (*((base) + 20) |= (mask))
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#define DIRECT_WRITE_LOW(base, mask) (*((base)+8) = (mask))
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#define DIRECT_WRITE_LOW(base, mask) (*((base) + 8) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) (*((base)+4) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) (*((base) + 4) = (mask))
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#elif defined(__SAM3X8E__) || defined(__SAM3A8C__) || defined(__SAM3A4C__)
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#elif defined(__SAM3X8E__) || defined(__SAM3A8C__) || defined(__SAM3A4C__)
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// Arduino 1.5.1 may have a bug in delayMicroseconds() on Arduino Due.
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// Arduino 1.5.1 may have a bug in delayMicroseconds() on Arduino Due.
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@@ -104,11 +104,11 @@
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#define IO_REG_TYPE uint32_t
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*((base)+15)) & (mask)) ? 1 : 0)
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#define DIRECT_READ(base, mask) (((*((base) + 15)) & (mask)) ? 1 : 0)
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#define DIRECT_MODE_INPUT(base, mask) ((*((base)+5)) = (mask))
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#define DIRECT_MODE_INPUT(base, mask) ((*((base) + 5)) = (mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+4)) = (mask))
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#define DIRECT_MODE_OUTPUT(base, mask) ((*((base) + 4)) = (mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base)+13)) = (mask))
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#define DIRECT_WRITE_LOW(base, mask) ((*((base) + 13)) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+12)) = (mask))
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#define DIRECT_WRITE_HIGH(base, mask) ((*((base) + 12)) = (mask))
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#ifndef PROGMEM
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#ifndef PROGMEM
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#define PROGMEM
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#define PROGMEM
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#endif
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#endif
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@@ -122,11 +122,11 @@
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#define IO_REG_TYPE uint32_t
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define IO_REG_MASK_ATTR
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#define DIRECT_READ(base, mask) (((*(base+4)) & (mask)) ? 1 : 0) //PORTX + 0x10
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#define DIRECT_READ(base, mask) (((*(base + 4)) & (mask)) ? 1 : 0) //PORTX + 0x10
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#define DIRECT_MODE_INPUT(base, mask) ((*(base+2)) = (mask)) //TRISXSET + 0x08
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#define DIRECT_MODE_INPUT(base, mask) ((*(base + 2)) = (mask)) //TRISXSET + 0x08
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#define DIRECT_MODE_OUTPUT(base, mask) ((*(base+1)) = (mask)) //TRISXCLR + 0x04
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#define DIRECT_MODE_OUTPUT(base, mask) ((*(base + 1)) = (mask)) //TRISXCLR + 0x04
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#define DIRECT_WRITE_LOW(base, mask) ((*(base+8+1)) = (mask)) //LATXCLR + 0x24
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#define DIRECT_WRITE_LOW(base, mask) ((*(base + 8 + 1)) = (mask)) //LATXCLR + 0x24
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#define DIRECT_WRITE_HIGH(base, mask) ((*(base+8+2)) = (mask)) //LATXSET + 0x28
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#define DIRECT_WRITE_HIGH(base, mask) ((*(base + 8 + 2)) = (mask)) //LATXSET + 0x28
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#elif defined(ARDUINO_ARCH_ESP8266)
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#elif defined(ARDUINO_ARCH_ESP8266)
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// Special note: I depend on the ESP community to maintain these definitions and
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// Special note: I depend on the ESP community to maintain these definitions and
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@@ -134,7 +134,7 @@
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// resolve any problems related to ESP chips. Please do not contact me and please
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// resolve any problems related to ESP chips. Please do not contact me and please
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// DO NOT CREATE GITHUB ISSUES for ESP support. All ESP questions must be asked
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// DO NOT CREATE GITHUB ISSUES for ESP support. All ESP questions must be asked
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// on ESP community forums.
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// on ESP community forums.
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#define PIN_TO_BASEREG(pin) ((volatile uint32_t*) GPO)
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#define PIN_TO_BASEREG(pin) ((volatile uint32_t *)GPO)
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#define PIN_TO_BITMASK(pin) (1 << pin)
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#define PIN_TO_BITMASK(pin) (1 << pin)
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#define IO_REG_TYPE uint32_t
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#define IO_REG_TYPE uint32_t
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#define IO_REG_BASE_ATTR
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#define IO_REG_BASE_ATTR
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@@ -147,6 +147,7 @@
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#elif defined(ARDUINO_ARCH_ESP32)
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#elif defined(ARDUINO_ARCH_ESP32)
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#include <driver/rtc_io.h>
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#include <driver/rtc_io.h>
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#include <soc/gpio_struct.h>
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#if ESP_IDF_VERSION_MAJOR >= 5
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#if ESP_IDF_VERSION_MAJOR >= 5
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#include "soc/gpio_periph.h"
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#include "soc/gpio_periph.h"
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#endif // ESP_IDF_VERSION_MAJOR >= 5
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#endif // ESP_IDF_VERSION_MAJOR >= 5
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@@ -156,9 +157,7 @@
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#define IO_REG_BASE_ATTR
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#define IO_REG_BASE_ATTR
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#define IO_REG_MASK_ATTR
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#define IO_REG_MASK_ATTR
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static inline __attribute__((always_inline))
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static inline __attribute__((always_inline)) IO_REG_TYPE directRead(IO_REG_TYPE pin) {
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IO_REG_TYPE directRead(IO_REG_TYPE pin)
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{
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// return digitalRead(pin); // Works most of the time
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// return digitalRead(pin); // Works most of the time
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// return gpio_ll_get_level(&GPIO, pin); // The hal is not public api, don't use in application code
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// return gpio_ll_get_level(&GPIO, pin); // The hal is not public api, don't use in application code
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@@ -166,18 +165,15 @@ IO_REG_TYPE directRead(IO_REG_TYPE pin)
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#if SOC_GPIO_PIN_COUNT <= 32
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#if SOC_GPIO_PIN_COUNT <= 32
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return (GPIO.in.val >> pin) & 0x1;
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return (GPIO.in.val >> pin) & 0x1;
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#else // ESP32 with over 32 gpios
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#else // ESP32 with over 32 gpios
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if ( pin < 32 )
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if (pin < 32)
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return (GPIO.in >> pin) & 0x1;
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return (GPIO.in >> pin) & 0x1;
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else
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else
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return (GPIO.in1.val >> (pin - 32)) & 0x1;
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return (GPIO.in1.val >> (pin - 32)) & 0x1;
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#endif
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#endif
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return 0;
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return 0;
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}
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}
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static inline __attribute__((always_inline))
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static inline __attribute__((always_inline)) void directWriteLow(IO_REG_TYPE pin) {
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void directWriteLow(IO_REG_TYPE pin)
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{
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// digitalWrite(pin, 0); // Works most of the time
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// digitalWrite(pin, 0); // Works most of the time
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// gpio_ll_set_level(&GPIO, pin, 0); // The hal is not public api, don't use in application code
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// gpio_ll_set_level(&GPIO, pin, 0); // The hal is not public api, don't use in application code
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@@ -185,16 +181,14 @@ void directWriteLow(IO_REG_TYPE pin)
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#if SOC_GPIO_PIN_COUNT <= 32
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#if SOC_GPIO_PIN_COUNT <= 32
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GPIO.out_w1tc.val = ((uint32_t)1 << pin);
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GPIO.out_w1tc.val = ((uint32_t)1 << pin);
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#else // ESP32 with over 32 gpios
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#else // ESP32 with over 32 gpios
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if ( pin < 32 )
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if (pin < 32)
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GPIO.out_w1tc = ((uint32_t)1 << pin);
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GPIO.out_w1tc = ((uint32_t)1 << pin);
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else
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else
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GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));
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GPIO.out1_w1tc.val = ((uint32_t)1 << (pin - 32));
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#endif
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#endif
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}
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}
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static inline __attribute__((always_inline))
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static inline __attribute__((always_inline)) void directWriteHigh(IO_REG_TYPE pin) {
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void directWriteHigh(IO_REG_TYPE pin)
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{
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// digitalWrite(pin, 1); // Works most of the time
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// digitalWrite(pin, 1); // Works most of the time
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// gpio_ll_set_level(&GPIO, pin, 1); // The hal is not public api, don't use in application code
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// gpio_ll_set_level(&GPIO, pin, 1); // The hal is not public api, don't use in application code
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@@ -202,56 +196,47 @@ void directWriteHigh(IO_REG_TYPE pin)
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#if SOC_GPIO_PIN_COUNT <= 32
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#if SOC_GPIO_PIN_COUNT <= 32
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GPIO.out_w1ts.val = ((uint32_t)1 << pin);
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GPIO.out_w1ts.val = ((uint32_t)1 << pin);
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#else // ESP32 with over 32 gpios
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#else // ESP32 with over 32 gpios
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if ( pin < 32 )
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if (pin < 32)
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GPIO.out_w1ts = ((uint32_t)1 << pin);
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GPIO.out_w1ts = ((uint32_t)1 << pin);
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else
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else
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GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));
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GPIO.out1_w1ts.val = ((uint32_t)1 << (pin - 32));
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#endif
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#endif
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}
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}
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static inline __attribute__((always_inline))
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static inline __attribute__((always_inline)) void directModeInput(IO_REG_TYPE pin) {
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void directModeInput(IO_REG_TYPE pin)
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// pinMode(pin, INPUT); // Too slow - doesn't work
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{
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// gpio_ll_output_disable(&GPIO, pin); // The hal is not public api, don't use in application code
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// pinMode(pin, INPUT); // Too slow - doesn't work
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// gpio_ll_output_disable(&GPIO, pin); // The hal is not public api, don't use in application code
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if ( digitalPinIsValid(pin) )
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if (digitalPinIsValid(pin)) {
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{
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// Input
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// Input
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//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
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//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
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#if SOC_GPIO_PIN_COUNT <= 32
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#if SOC_GPIO_PIN_COUNT <= 32
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GPIO.enable_w1tc.val = ((uint32_t)1 << (pin));
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GPIO.enable_w1tc.val = ((uint32_t)1 << (pin));
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#else // ESP32 with over 32 gpios
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#else // ESP32 with over 32 gpios
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if ( pin < 32 )
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if (pin < 32)
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GPIO.enable_w1tc = ((uint32_t)1 << pin);
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GPIO.enable_w1tc = ((uint32_t)1 << pin);
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else
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else
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GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));
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GPIO.enable1_w1tc.val = ((uint32_t)1 << (pin - 32));
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#endif
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#endif
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}
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}
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}
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}
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static inline __attribute__((always_inline))
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static inline __attribute__((always_inline)) void directModeOutput(IO_REG_TYPE pin) {
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void directModeOutput(IO_REG_TYPE pin)
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// pinMode(pin, OUTPUT); // Too slow - doesn't work
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{
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// gpio_ll_output_enable(&GPIO, pin); // The hal is not public api, don't use in application code
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// pinMode(pin, OUTPUT); // Too slow - doesn't work
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// gpio_ll_output_enable(&GPIO, pin); // The hal is not public api, don't use in application code
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|
|
|
|
|
if ( digitalPinCanOutput(pin) )
|
|
|
|
if (digitalPinCanOutput(pin)) {
|
|
|
|
{
|
|
|
|
|
|
|
|
// Output
|
|
|
|
// Output
|
|
|
|
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
|
|
|
|
//#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
|
|
|
|
#if SOC_GPIO_PIN_COUNT <= 32
|
|
|
|
#if SOC_GPIO_PIN_COUNT <= 32
|
|
|
|
GPIO.enable_w1ts.val = ((uint32_t)1 << (pin));
|
|
|
|
GPIO.enable_w1ts.val = ((uint32_t)1 << (pin));
|
|
|
|
#else // ESP32 with over 32 gpios
|
|
|
|
#else // ESP32 with over 32 gpios
|
|
|
|
if ( pin < 32 )
|
|
|
|
if (pin < 32)
|
|
|
|
GPIO.enable_w1ts = ((uint32_t)1 << pin);
|
|
|
|
GPIO.enable_w1ts = ((uint32_t)1 << pin);
|
|
|
|
else
|
|
|
|
else
|
|
|
|
GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));
|
|
|
|
GPIO.enable1_w1ts.val = ((uint32_t)1 << (pin - 32));
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#define DIRECT_READ(base, pin) directRead(pin)
|
|
|
|
#define DIRECT_READ(base, pin) directRead(pin)
|
|
|
|
@@ -266,11 +251,11 @@ void directModeOutput(IO_REG_TYPE pin)
|
|
|
|
#define IO_REG_TYPE uint32_t
|
|
|
|
#define IO_REG_TYPE uint32_t
|
|
|
|
#define IO_REG_BASE_ATTR
|
|
|
|
#define IO_REG_BASE_ATTR
|
|
|
|
#define IO_REG_MASK_ATTR
|
|
|
|
#define IO_REG_MASK_ATTR
|
|
|
|
#define DIRECT_READ(base, mask) (((*((base)+8)) & (mask)) ? 1 : 0)
|
|
|
|
#define DIRECT_READ(base, mask) (((*((base) + 8)) & (mask)) ? 1 : 0)
|
|
|
|
#define DIRECT_MODE_INPUT(base, mask) ((*((base)+1)) = (mask))
|
|
|
|
#define DIRECT_MODE_INPUT(base, mask) ((*((base) + 1)) = (mask))
|
|
|
|
#define DIRECT_MODE_OUTPUT(base, mask) ((*((base)+2)) = (mask))
|
|
|
|
#define DIRECT_MODE_OUTPUT(base, mask) ((*((base) + 2)) = (mask))
|
|
|
|
#define DIRECT_WRITE_LOW(base, mask) ((*((base)+5)) = (mask))
|
|
|
|
#define DIRECT_WRITE_LOW(base, mask) ((*((base) + 5)) = (mask))
|
|
|
|
#define DIRECT_WRITE_HIGH(base, mask) ((*((base)+6)) = (mask))
|
|
|
|
#define DIRECT_WRITE_HIGH(base, mask) ((*((base) + 6)) = (mask))
|
|
|
|
|
|
|
|
|
|
|
|
#elif defined(RBL_NRF51822)
|
|
|
|
#elif defined(RBL_NRF51822)
|
|
|
|
#define PIN_TO_BASEREG(pin) (0)
|
|
|
|
#define PIN_TO_BASEREG(pin) (0)
|
|
|
|
@@ -305,9 +290,7 @@ void directModeOutput(IO_REG_TYPE pin)
|
|
|
|
#define IO_REG_BASE_ATTR
|
|
|
|
#define IO_REG_BASE_ATTR
|
|
|
|
#define IO_REG_MASK_ATTR
|
|
|
|
#define IO_REG_MASK_ATTR
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) IO_REG_TYPE directRead(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
|
|
|
|
IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
IO_REG_TYPE ret;
|
|
|
|
IO_REG_TYPE ret;
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));
|
|
|
|
ret = READ_ARC_REG(((IO_REG_TYPE)base + EXT_PORT_OFFSET_SS));
|
|
|
|
@@ -317,31 +300,23 @@ IO_REG_TYPE directRead(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
return ((ret >> GPIO_ID(pin)) & 0x01);
|
|
|
|
return ((ret >> GPIO_ID(pin)) & 0x01);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directModeInput(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
|
|
|
|
void directModeInput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)),
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG((((IO_REG_TYPE)base) + DIR_OFFSET_SS)) & ~(0x01 << GPIO_ID(pin)), ((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
|
|
|
|
((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
|
|
|
|
|
|
|
|
} else {
|
|
|
|
} else {
|
|
|
|
MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));
|
|
|
|
MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) &= ~(0x01 << GPIO_ID(pin));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directModeOutput(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
|
|
|
|
void directModeOutput(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)),
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG(((IO_REG_TYPE)(base) + DIR_OFFSET_SS)) | (0x01 << GPIO_ID(pin)), ((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
|
|
|
|
((IO_REG_TYPE)(base) + DIR_OFFSET_SS));
|
|
|
|
|
|
|
|
} else {
|
|
|
|
} else {
|
|
|
|
MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));
|
|
|
|
MMIO_REG_VAL_FROM_BASE((IO_REG_TYPE)base, DIR_OFFSET_SOC) |= (0x01 << GPIO_ID(pin));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directWriteLow(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
|
|
|
|
void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG(base) & ~(0x01 << GPIO_ID(pin)), base);
|
|
|
|
} else {
|
|
|
|
} else {
|
|
|
|
@@ -349,9 +324,7 @@ void directWriteLow(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directWriteHigh(volatile IO_REG_TYPE * base, IO_REG_TYPE pin) {
|
|
|
|
void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
if (SS_GPIO == GPIO_TYPE(pin)) {
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);
|
|
|
|
WRITE_ARC_REG(READ_ARC_REG(base) | (0x01 << GPIO_ID(pin)), base);
|
|
|
|
} else {
|
|
|
|
} else {
|
|
|
|
@@ -380,15 +353,11 @@ void directWriteHigh(volatile IO_REG_TYPE *base, IO_REG_TYPE pin)
|
|
|
|
#define IO_REG_BASE_ATTR
|
|
|
|
#define IO_REG_BASE_ATTR
|
|
|
|
#define IO_REG_MASK_ATTR
|
|
|
|
#define IO_REG_MASK_ATTR
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) IO_REG_TYPE directRead(IO_REG_TYPE mask) {
|
|
|
|
IO_REG_TYPE directRead(IO_REG_TYPE mask)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
return ((GPIO_REG(GPIO_INPUT_VAL) & mask) != 0) ? 1 : 0;
|
|
|
|
return ((GPIO_REG(GPIO_INPUT_VAL) & mask) != 0) ? 1 : 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directModeInput(IO_REG_TYPE mask) {
|
|
|
|
void directModeInput(IO_REG_TYPE mask)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_IOF_EN) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_IOF_EN) &= ~mask;
|
|
|
|
|
|
|
|
|
|
|
|
@@ -396,9 +365,7 @@ void directModeInput(IO_REG_TYPE mask)
|
|
|
|
GPIO_REG(GPIO_OUTPUT_EN) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_OUTPUT_EN) &= ~mask;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directModeOutput(IO_REG_TYPE mask) {
|
|
|
|
void directModeOutput(IO_REG_TYPE mask)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_OUTPUT_XOR) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_IOF_EN) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_IOF_EN) &= ~mask;
|
|
|
|
|
|
|
|
|
|
|
|
@@ -406,15 +373,11 @@ void directModeOutput(IO_REG_TYPE mask)
|
|
|
|
GPIO_REG(GPIO_OUTPUT_EN) |= mask;
|
|
|
|
GPIO_REG(GPIO_OUTPUT_EN) |= mask;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directWriteLow(IO_REG_TYPE mask) {
|
|
|
|
void directWriteLow(IO_REG_TYPE mask)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
GPIO_REG(GPIO_OUTPUT_VAL) &= ~mask;
|
|
|
|
GPIO_REG(GPIO_OUTPUT_VAL) &= ~mask;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static inline __attribute__((always_inline))
|
|
|
|
static inline __attribute__((always_inline)) void directWriteHigh(IO_REG_TYPE mask) {
|
|
|
|
void directWriteHigh(IO_REG_TYPE mask)
|
|
|
|
|
|
|
|
{
|
|
|
|
|
|
|
|
GPIO_REG(GPIO_OUTPUT_VAL) |= mask;
|
|
|
|
GPIO_REG(GPIO_OUTPUT_VAL) |= mask;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
@@ -433,18 +396,17 @@ void directWriteHigh(IO_REG_TYPE mask)
|
|
|
|
#define DIRECT_READ(base, pin) digitalRead(pin)
|
|
|
|
#define DIRECT_READ(base, pin) digitalRead(pin)
|
|
|
|
#define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW)
|
|
|
|
#define DIRECT_WRITE_LOW(base, pin) digitalWrite(pin, LOW)
|
|
|
|
#define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH)
|
|
|
|
#define DIRECT_WRITE_HIGH(base, pin) digitalWrite(pin, HIGH)
|
|
|
|
#define DIRECT_MODE_INPUT(base, pin) pinMode(pin,INPUT)
|
|
|
|
#define DIRECT_MODE_INPUT(base, pin) pinMode(pin, INPUT)
|
|
|
|
#define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin,OUTPUT)
|
|
|
|
#define DIRECT_MODE_OUTPUT(base, pin) pinMode(pin, OUTPUT)
|
|
|
|
#warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture."
|
|
|
|
#warning "OneWire. Fallback mode. Using API calls for pinMode,digitalRead and digitalWrite. Operation of this library is not guaranteed on this architecture."
|
|
|
|
|
|
|
|
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
class OneWire
|
|
|
|
class OneWire {
|
|
|
|
{
|
|
|
|
|
|
|
|
private:
|
|
|
|
private:
|
|
|
|
IO_REG_TYPE bitmask;
|
|
|
|
IO_REG_TYPE bitmask;
|
|
|
|
volatile IO_REG_TYPE *baseReg;
|
|
|
|
volatile IO_REG_TYPE * baseReg;
|
|
|
|
|
|
|
|
|
|
|
|
#if ONEWIRE_SEARCH
|
|
|
|
#if ONEWIRE_SEARCH
|
|
|
|
// global search state
|
|
|
|
// global search state
|
|
|
|
@@ -455,8 +417,11 @@ class OneWire
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
public:
|
|
|
|
public:
|
|
|
|
OneWire() { }
|
|
|
|
OneWire() {
|
|
|
|
OneWire(uint8_t pin) { begin(pin); }
|
|
|
|
}
|
|
|
|
|
|
|
|
OneWire(uint8_t pin) {
|
|
|
|
|
|
|
|
begin(pin);
|
|
|
|
|
|
|
|
}
|
|
|
|
void begin(uint8_t pin);
|
|
|
|
void begin(uint8_t pin);
|
|
|
|
// OneWire( uint8_t pin);
|
|
|
|
// OneWire( uint8_t pin);
|
|
|
|
|
|
|
|
|
|
|
|
@@ -477,12 +442,12 @@ class OneWire
|
|
|
|
// another read or write.
|
|
|
|
// another read or write.
|
|
|
|
void write(uint8_t v, uint8_t power = 0);
|
|
|
|
void write(uint8_t v, uint8_t power = 0);
|
|
|
|
|
|
|
|
|
|
|
|
void write_bytes(const uint8_t *buf, uint16_t count, bool power = 0);
|
|
|
|
void write_bytes(const uint8_t * buf, uint16_t count, bool power = 0);
|
|
|
|
|
|
|
|
|
|
|
|
// Read a byte.
|
|
|
|
// Read a byte.
|
|
|
|
uint8_t read(void);
|
|
|
|
uint8_t read(void);
|
|
|
|
|
|
|
|
|
|
|
|
void read_bytes(uint8_t *buf, uint16_t count);
|
|
|
|
void read_bytes(uint8_t * buf, uint16_t count);
|
|
|
|
|
|
|
|
|
|
|
|
// Write a bit. The bus is always left powered at the end, see
|
|
|
|
// Write a bit. The bus is always left powered at the end, see
|
|
|
|
// note in write() about that.
|
|
|
|
// note in write() about that.
|
|
|
|
@@ -512,13 +477,13 @@ class OneWire
|
|
|
|
// might be a good idea to check the CRC to make sure you didn't
|
|
|
|
// might be a good idea to check the CRC to make sure you didn't
|
|
|
|
// get garbage. The order is deterministic. You will always get
|
|
|
|
// get garbage. The order is deterministic. You will always get
|
|
|
|
// the same devices in the same order.
|
|
|
|
// the same devices in the same order.
|
|
|
|
uint8_t search(uint8_t *newAddr, bool search_mode = true);
|
|
|
|
uint8_t search(uint8_t * newAddr, bool search_mode = true);
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
#if ONEWIRE_CRC
|
|
|
|
#if ONEWIRE_CRC
|
|
|
|
// Compute a Dallas Semiconductor 8 bit CRC, these are used in the
|
|
|
|
// Compute a Dallas Semiconductor 8 bit CRC, these are used in the
|
|
|
|
// ROM and scratchpad registers.
|
|
|
|
// ROM and scratchpad registers.
|
|
|
|
static uint8_t crc8(const uint8_t *addr, uint8_t len);
|
|
|
|
static uint8_t crc8(const uint8_t * addr, uint8_t len);
|
|
|
|
|
|
|
|
|
|
|
|
#if ONEWIRE_CRC16
|
|
|
|
#if ONEWIRE_CRC16
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// Compute the 1-Wire CRC16 and compare it against the received CRC.
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// Compute the 1-Wire CRC16 and compare it against the received CRC.
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@@ -541,7 +506,7 @@ class OneWire
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// *not* at a 16-bit integer.
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// *not* at a 16-bit integer.
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// @param crc - The crc starting value (optional)
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// @param crc - The crc starting value (optional)
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// @return True, iff the CRC matches.
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// @return True, iff the CRC matches.
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static bool check_crc16(const uint8_t* input, uint16_t len, const uint8_t* inverted_crc, uint16_t crc = 0);
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static bool check_crc16(const uint8_t * input, uint16_t len, const uint8_t * inverted_crc, uint16_t crc = 0);
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// Compute a Dallas Semiconductor 16 bit CRC. This is required to check
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// Compute a Dallas Semiconductor 16 bit CRC. This is required to check
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// the integrity of data received from many 1-Wire devices. Note that the
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// the integrity of data received from many 1-Wire devices. Note that the
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@@ -555,7 +520,7 @@ class OneWire
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// @param len - How many bytes to use.
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// @param len - How many bytes to use.
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// @param crc - The crc starting value (optional)
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// @param crc - The crc starting value (optional)
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// @return The CRC16, as defined by Dallas Semiconductor.
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// @return The CRC16, as defined by Dallas Semiconductor.
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static uint16_t crc16(const uint8_t* input, uint16_t len, uint16_t crc = 0);
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static uint16_t crc16(const uint8_t * input, uint16_t len, uint16_t crc = 0);
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#endif
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#endif
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#endif
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#endif
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};
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};
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